Offset IC Package Stacking for Density and Reliability
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Solution Overview
Problem
Current multi-chip packages face challenges in increasing integrated circuit density, miniaturization, and reliability due to limitations in testing individual integrated circuits before assembly, leading to assembly defects and increased costs, especially in compact consumer electronics.
Innovation Solution
The offset integrated circuit package-on-package stacking system involves a base substrate with a contact pad, where a first integrated circuit is mounted and encapsulated, and a second integrated circuit is mounted on an offset substrate coupled to the base package body, reducing space requirements and allowing for additional components without increasing package size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If conventional multi-chip packages are used with horizontal or vertical stacking, then integrated circuit density can be increased, but individual integrated circuits cannot be tested before assembly leading to assembly defects
Solution Approach 1:
The patent applies preliminary action by enabling individual integrated circuit testing before assembly into the multi-chip package. The offset stacking configuration allows test access to the first integrated circuit on the base substrate and the second integrated circuit on the offset substrate prior to final assembly, ensuring known-good-die are selected and assembled, thereby reducing assembly defects while maintaining high density
2Volume of moving object
If vertically stacked integrated circuits are used to increase density, then miniaturization is achieved, but testing and determining failure modes becomes more difficult
Solution Approach 1:
The patent applies asymmetry through the offset stacking configuration where the second integrated circuit is positioned offset from the first integrated circuit rather than directly above it. This asymmetric arrangement creates test access pathways that would be blocked in a symmetric vertical stack, enabling failure mode detection while achieving miniaturization
3Quantity of substance
If more integrated circuits are mounted on a substrate to increase density, then the number of components increases, but the available real estate on the substrate is limited
Solution Approach 1:
The patent applies dimensionality change by transitioning from a two-dimensional substrate layout to a three-dimensional offset stacking configuration. The first integrated circuit resides on the base substrate while the second integrated circuit is mounted on an offset substrate positioned in the vertical dimension, effectively utilizing Z-axis space to increase component density without expanding the substrate footprint
Data Source
AI summary
An offset integrated circuit package-on-package stacking system is provided including providing a base substrate, forming a contact pad on the base substrate, mounting a first integrated circuit on the base substrate, forming a base package body around the first integrated circuit, providing an offset substrate, mounting a second integrated circuit on the offset substrate, and coupling the offset substrate to the contact pad, including placing the offset substrate on the base package body.