Offset PCB Pad Layout for Crack-Resistant SMD Solder Joints

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Solution Overview

Problem

Existing surface-mount component (SMD) solder joints on electronic boards are prone to cracking due to high shear stresses and relative displacements caused by differential thermal expansion, leading to reduced lifespan and reliability, especially in harsh environments.

Innovation Solution

Adjust the positioning of solder pads on the printed circuit board to ensure they are located on either side of the SMD terminations, with a distance calculated to compensate for the difference in thermal expansion coefficients, and optionally use sacrificial pads or glue to stabilize the SMD during soldering.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional solder pad positioning is used with SMD terminations directly over the pad, then assembly process is simple, but the solder joint is subjected to high shear stress and prone to cracking

Engineering Contradiction:
Improvesolder joint reliabilityVSAvoidpad positioning complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The invention transitions from a conventional planar alignment (SMD termination directly over the solder pad) to a lateral offset configuration where the solder pad is positioned at a distance from the termination. This dimensional repositioning creates a lever arm that reduces shear stress on the solder joint while maintaining mechanical integrity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The invention modifies the geometric parameters of the assembly by introducing a specific distance relationship between the solder pad and SMD termination. The pad is positioned at a calculated distance from the termination, transforming the stress distribution through parameter optimization rather than changing the fundamental joining method.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If solder pad distance is increased to compensate for thermal expansion, then stress from differential expansion is reduced, but manufacturing precision requirements increase

Engineering Contradiction:
Improvethermal stress resistanceVSAvoidpad positioning precision
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The invention incorporates thermal expansion compensation into the initial pad positioning design. By pre-calculating and pre-positioning the solder pad at an optimized distance from the termination based on thermal expansion coefficients, the design proactively compensates for thermal stresses before they occur during operation, eliminating the need for additional compensation mechanisms.

Inventive Principle:
Principle #10Preliminary action

3Strength

If solder joint thickness is increased to improve robustness, then flexibility and stress resistance improve, but assembly complexity and cost increase

Engineering Contradiction:
Improvesolder joint strengthVSAvoidassembly process complexity
Core Design Contradiction:
StrengthVSDevice complexity

Solution Approach 1:

The invention extracts the stress concentration issue from the solder joint itself and relocates it to the pad positioning geometry. By offsetting the pad laterally, the design removes the need for increased solder joint thickness to achieve stress resistance, maintaining a thin, robust joint while improving overall assembly strength through geometric optimization rather than material volume increase.

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the lifespan and robustness of SMD solder joints by minimizing stress and preventing cracking, while maintaining assembly efficiency and cost-effectiveness.

Implementation Method 1

The component leads (SMDs) are then placed on the solder paste before undergoing a reflow heat treatment. During this process, the heat remelts the alloy and evaporates the solder flux, forming solder joints from the metal alloy in the solder paste.

Methodology Applied
Scientific EffectReflow heating: Heating

Implementation Method 2

The component leads (SMDs) are then placed on the paste before undergoing a sintering heat treatment, during which the heat causes the grains to bond together without melting them, thus creating the joint.

Methodology Applied
Scientific EffectSintering: Sintering

Implementation Method 3

The joints are therefore subjected to very high stresses, particularly shear stress, and are thus at risk of cracking rapidly when the circuit board is subjected to harsh environments with high temperatures and/or vibrations.

Methodology Applied
Scientific EffectShear stress: Shear Stress

Implementation Method 4

These relative displacements are generally due to differential expansion between the SMDs and the PCB resulting from temperature variations, as the SMDs and the PCB typically have different coefficients of thermal expansion in the plane.

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Data Source

PatentEP3729917B1Removal of high stress zones in electronic assemblies
Publication Date: 2026.02.04 SAFRAN ELECTRONICS & DEFENSE (FR)
  • EP3729917B1 patent drawingFigure 1~2a
  • EP3729917B1 patent drawingFigure 2b~3
  • EP3729917B1 patent drawingFigure 4~5

AI summary

The invention relates to an electronic board (1) comprising: - a printed circuit (2) having a connection face (3) defining a plane (X, Y) comprising at least one transfer area (4); - an electronic component (5) comprising at least one contact terminal (6), each contact terminal (6) being brazed or sintered on an associated transfer area (4) by means of a brazing joint or of a sintering joint (7), the electronic board being characterised in that an orthogonal projection of the contact terminal (6) of the electronic component (5) on the connection face (3) of the printed circuit does not overlap the associated area (4).