Offset Pillar Pad Semiconductor Device for High Density Memory
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Solution Overview
Problem
High integration density in semiconductor data storage devices often leads to reliability issues, as the increased complexity can result in reduced performance and increased susceptibility to defects.
Innovation Solution
The semiconductor device design includes a pillar pattern with a laterally offset central axis from the contact plug, a pad extending along the sidewall of the pillar pattern, and a data storage portion electrically connected to the pad, with an upper interlayer dielectric covering the pad and pillar pattern to prevent exposure to etch byproducts during data storage formation, thereby enhancing reliability and integration density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If high integration density is achieved by decreasing line widths of components, then integration density is improved, but reliability deteriorates due to increased susceptibility to defects
Solution Approach 1:
The patent transitions from a conventional aligned structure to a laterally offset structure where the data storage portion is positioned at a lateral distance from the contact plug. This dimensional change allows for increased integration density while maintaining reliability by separating the data storage function from the contact structure, reducing the impact of alignment errors and manufacturing variations.
Solution Approach 2:
The pad structure serves as an intermediary element that electrically connects the contact plug to the data storage portion. This mediator allows for reliable electrical connection while accommodating the lateral offset between the contact plug and data storage portion, thereby maintaining reliability despite the non-aligned configuration that enables higher integration density.
2Quantity of substance
If high integration density is achieved, then integration density is improved, but device complexity increases leading to reduced performance
Solution Approach 1:
By introducing lateral offset between components rather than relying solely on vertical stacking or tight horizontal alignment, the patent simplifies the overall device architecture. This dimensional approach reduces the complexity of precise alignment while achieving high integration density through optimized spatial arrangement.
Solution Approach 2:
The pad structure performs multiple functions: it provides electrical connection between the contact plug and data storage portion, accommodates lateral offset, and maintains structural integrity. This multi-functionality reduces the need for additional specialized components, thereby reducing overall device complexity while achieving high integration.
3Ease of manufacture
If conventional aligned structure is used, then manufacturing is simpler, but reliability is reduced due to exposure to etch byproducts
Solution Approach 1:
The lateral offset configuration changes the spatial relationship between components, allowing the upper interlayer dielectric to effectively cover the pad structure. This dimensional arrangement prevents direct exposure to etch byproducts during data storage portion formation while maintaining manufacturing feasibility through standard layering techniques.
Solution Approach 2:
The upper interlayer dielectric acts as a protective intermediary layer that covers the pad structure during subsequent processing steps. This mediator prevents harmful etch byproducts from directly contacting the pad and data storage portion, thereby improving reliability without significantly complicating the manufacturing process.
Data Source
AI summary
A semiconductor device includes an interlayer dielectric on a semiconductor substrate, a contact plug penetrating the interlayer dielectric, a pillar pattern disposed on the interlayer dielectric and having a central axis laterally offset from a central axis of the contact plug, a pad extending on the contact plug and along a sidewall of the pillar pattern, the pad being electrically connected to the contact plug, and a data storage portion on the pillar pattern and electrically connected to the pad.