Offset Sampling Clocks for Correlated Noise Reduction
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Solution Overview
Problem
In multi-channel signal processing systems, such as those found in image sensors, simultaneous switching of sampling units introduces correlated noise errors due to shared voltage supplies, which are captured as artifacts in the signal.
Innovation Solution
Generating offset clock signals from a master clock and distributing them to sampling devices to stagger their sampling operations, reducing noise by spreading switching events over a time window rather than synchronizing them.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If simultaneous switching of sampling units is used, then sampling speed and processing efficiency are improved, but correlated noise errors increase due to shared voltage supplies
Solution Approach 1:
The patent divides the simultaneous sampling operation into segmented time intervals. Instead of all sampling units switching at the same clock edge, each sampling unit is assigned a unique timing offset, segmenting the switching events across multiple time slots. This segmentation distributes the noise generation over time, reducing correlated noise while maintaining sampling throughput.
Solution Approach 2:
The patent introduces dynamic timing offsets for each sampling unit based on their identifier. The clock signal is modulated with dynamic offsets that vary per sampling unit, transforming the static simultaneous switching into a dynamic distributed switching pattern. This dynamic approach allows the system to maintain high sampling speed while eliminating correlated noise through temporal distribution.
2Device complexity
If sampling units switch simultaneously, then system simplicity is maintained, but noise artifacts appear in the recovered signal
Solution Approach 1:
The patent performs preliminary assignment of timing offsets to each sampling unit based on their identifiers before the actual sampling operation. The offset values are pre-calculated and stored, allowing the sampling units to automatically apply their assigned offsets without complex real-time control logic. This preliminary action maintains system simplicity while eliminating noise artifacts through predetermined distributed timing.
Solution Approach 2:
The patent changes the timing parameter of the clock signal for each sampling unit by introducing individual offsets. Instead of using a single uniform clock edge for all sampling units, the system modifies the time parameter of the sampling event for each unit based on its identifier. This parameter change transforms the simultaneous switching into distributed switching, reducing noise while maintaining implementation simplicity through straightforward parameter modification.
Data Source
AI summary
Techniques to reduce correlated errors in a multi-channel sampling system. A plurality of clock signals may be generated from a master clock signal, each with edges offset from each other. The offset clock signals may be distributed to a plurality of sampling devices. Each sampling device may capture a respective input signal according to its offset clock. In this manner, the sampling units may sample their inputs signals over a distributed window of time rather than sampling in response to a common clock edge. By distributing the switching operations performed by the sampling units, noise effects are likely to be reduced.