Offset Terminal Matrix for Single-Layer Semiconductor Interconnect
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Solution Overview
Problem
Current methods for mounting semiconductor components on electrical connection boards are costly and require complex multilayered boards and vias, with challenges in reducing the pitch of the ball matrix and optimizing terminal and track layouts for efficient routing.
Innovation Solution
The proposed electrical connection board features a specific layout of terminals and tracks arranged in a square matrix with offset groups, reducing the need for multilayered boards and vias, and optimizing track placement to minimize pitch and fabrication costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If multilayered boards and electrical connection vias are used for routing, then electrical connection terminals can be connected to other components, but fabrication costs increase and device complexity increases
Solution Approach 1:
The patent extracts and eliminates the need for electrical connection vias by routing all tracks on the single front face of the board. The terminal layout is specifically designed to allow tracks to reach all terminals without penetrating through the board, thereby removing the complex multilayered structure and via fabrication requirements
Solution Approach 2:
The board face is segmented into multiple zones, each containing terminals and their associated tracks confined to that zone. This segmentation allows independent routing optimization for each terminal group, enabling all connections to be made on the single face without requiring vias to other layers
2Manufacturing precision
If tracks are routed between lateral rows of terminals, then electrical connections can be established, but the pitch of the ball matrix must be increased
Solution Approach 1:
The patent utilizes the two-dimensional plane of the board face more efficiently by arranging tracks to serve multiple terminals within the same zone before extending to connection points. This dimensional optimization allows tracks to reach terminals without passing between lateral rows, maintaining a smaller ball matrix pitch
Solution Approach 2:
The terminal layout is pre-configured with specific spacing and positioning that anticipates track routing requirements. Terminals are arranged in patterns that naturally allow tracks to reach them without requiring excessive pitch, as the layout itself facilitates efficient routing paths
3Ease of manufacture
If electrical connection vias are produced to join tracks at depth, then multilayered board connections are achieved, but specific expensive fabrication means are required
Solution Approach 1:
The patent completely removes the via fabrication step from the manufacturing process by confining all track routing to the single front face. This extraction of the via requirement eliminates the need for expensive multilayered board fabrication while maintaining connection reliability through optimized surface-level track and terminal design
Data Source
AI summary
An electrical connection board includes electrical connection terminals on one face with a view toward connecting with a semiconductor component and electrical connection tracks connected respectively to these terminals. The terminals are arranged in a square matrix having two orthogonal directions. On its face, the board includes a multiplicity of identical adjacent connection groups, each group having N adjacent terminals and N tracks placed along this direction while extending towards an edge of the matrix. The terminals of a group are offset by one pitch relative to the terminals of an adjacent group. The board and a semiconductor component are connected together by electrical connection balls.