Offset Terminal Layout for Solder Void Release in Electronic Components
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Solution Overview
Problem
Existing surface-mount type electronic components using lead-free solder experience void formation due to low fluidity, leading to reduced connection strength, heat dissipation, and increased electrical resistance, which cannot be effectively addressed by shifting land patterns without design changes.
Innovation Solution
The electronic component design includes an offset terminal formation area relative to the mounting surface, allowing self-alignment during soldering to release voids externally without altering the land pattern layout, achieved through varying edge widths or inclinations and mold member thickness variations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If lead-free solder is used, then connection reliability is improved, but void formation increases due to low fluidity
Solution Approach 1:
The patent applies asymmetry by offsetting the terminal formation area from the center of the mounting surface. This creates an asymmetric configuration where the terminal electrodes are positioned at a predetermined offset distance from the center, which facilitates void release during soldering while maintaining connection reliability with lead-free solder.
2Object-generated harmful factors
If land pattern is shifted to reduce voids, then void release is improved, but design flexibility is reduced
Solution Approach 1:
Instead of shifting the land pattern on the mounting substrate (which would require design changes), the patent inverts the approach by offsetting the terminal formation area on the electronic component itself. This allows the same land pattern design to be used while achieving void release through the component's asymmetric terminal positioning.
3Object-generated harmful factors
If terminal formation area is offset, then void release is improved, but manufacturing precision requirements increase
Solution Approach 1:
The offset of the terminal formation area is predetermined and built into the electronic component design before mounting. This preliminary positioning ensures that during automated mounting, the component is placed with the correct offset relative to the land pattern, facilitating void release without requiring high-precision adjustments during the mounting process.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces internal solder voids, maintaining connection strength and heat dissipation while avoiding design changes to the mounting substrate, even with lead-free solder, by increasing solder paste surface area and facilitating void release.
Implementation Method 1
a solder paste is supplied to a land pattern on the mounting substrate, and the electronic component is mounted on the mounting substrate such that the solder paste and a terminal electrode of the electronic component contact each other, followed by reflow to melt the solder paste
Data Source
AI summary
Disclosed herein is an electronic component that includes a mounting surface having a terminal formation area and a plurality of terminal electrodes arranged in an array in the terminal formation area. The center point of the terminal formation area is offset with respect to the center point of the mounting surface. Thus, at mounting of the electronic component on a mounting substrate, a solder paste is supplied to a land pattern, and then the mounting is performed such that the center point of a mounting area and the center point of the mounting surface coincide with each other, whereby a predetermined displacement occurs between the planar positions of the land pattern and terminal electrode. This allows a void inside the solder to be released outside without involving a layout change of the land pattern.