Offset Test Pads for WLCSP Final Testing

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Solution Overview

Problem

The existing WLCSP testing procedures require separate and costly probe cards for final testing, which can be inefficient and costly, especially for devices with non-standard pin or ball configurations, limiting access to all test signals and increasing expenses.

Innovation Solution

The implementation of a WLCSP design with offset pads and redistribution layers (RDL) that connect pads to solder balls, allowing for reuse of the same test card for both wafer and final testing, reducing costs and facilitating access to all test signals without exposing pads to potential corrosion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If separate probe cards are used for wafer testing and final testing, then all test signals can be accessed, but testing costs increase significantly

Engineering Contradiction:
Improvetest signal accessibilityVSAvoidtesting cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent implements a universal probe card design that can perform both wafer-level testing and final device testing through the same physical card. The probe card includes test pads that are accessible at both processing stages, eliminating the need for separate probe cards and reducing overall testing costs while maintaining full test signal accessibility

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent structures the test pads and interconnects so that testing infrastructure is established during wafer fabrication. The test pads are created alongside functional pads in the same fabrication process, and the probe card design anticipates both wafer and final device testing needs, allowing a single probe card to serve multiple purposes throughout the manufacturing lifecycle

Inventive Principle:
Principle #10Preliminary action

2Ease of operation

If pads are exposed for final testing, then electrical testing can be performed, but pads become susceptible to corrosion

Engineering Contradiction:
Improveelectrical testing capabilityVSAvoidpad corrosion
Core Design Contradiction:
Ease of operationVSObject-affected harmful factors

Solution Approach 1:

The patent introduces an offset test pad structure that acts as an intermediary between the functional pad and the probe card contact point. The offset test pad is electrically connected to the functional pad through a test interconnect, allowing electrical testing to occur on the offset pad while the functional pad remains protected and covered, thus enabling testing without exposing the functional pad to corrosion

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent segments the pad structure into functional pads and offset test pads. The functional pads are covered and protected, while separate offset test pads are provided specifically for testing purposes. This segmentation allows the functional pads to remain protected from corrosion while still enabling electrical testing through the offset pads that are electrically connected to them

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS10396001B2Offset test pads for WLCSP final test
Publication Date: 2019.08.27 ADESTO TECHNOLOGIES CORP
  • US10396001B2 patent drawing
  • US10396001B2 patent drawing
  • US10396001B2 patent drawing

AI summary

A device configured for WLCSP, can include: a first pad; a test pad offset from the first pad; a first RDL path that connects the first pad to the test pad; and a second RDL path that connects the test pad to a solder ball. In another case, a device configured for WLCSP can include: a first pad; a test pad offset from the first pad; a first RDL path that connects the first pad to a solder ball; and a second RDL path that connects the test pad to the solder ball. A wafer having devices configured for WLCSP, can include: a first device having a first pad; a second device having a test pad; a first RDL path that connects the first pad to a solder ball; and a second RDL path that connects the test pad to the solder ball.