Alignment Mark for Polysilicon Crystallization in OLED Displays

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Solution Overview

Problem

The existing technologies for organic light emitting displays lack precision in controlling the position of crystallization of amorphous silicon and forming active layers, leading to non-uniform properties of thin film transistors and luminance in organic light emitting diodes.

Innovation Solution

The method involves forming an alignment mark on a substrate's non-display region, using a catalytic metal to control the crystallization of amorphous silicon into polysilicon, and forming an active layer with optimal grain boundaries and position, which improves the uniformity of thin film transistors and organic light emitting diodes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional amorphous silicon crystallization and active layer formation methods are used, then the manufacturing process can be completed, but the position control of crystallization and active layer formation is imprecise, leading to non-uniform thin film transistor properties and luminance

Engineering Contradiction:
Improveposition control of crystallization and active layer formationVSAvoiduniformity of thin film transistor properties and luminance
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent applies preliminary action by forming alignment marks on the substrate before the crystallization and active layer formation processes. These alignment marks serve as pre-established reference points that guide the subsequent manufacturing steps, ensuring precise position control of the polysilicon crystallization region and active layer formation. This preliminary positioning structure enables accurate alignment without requiring complex real-time control during the actual deposition and crystallization processes.

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If alignment marks are formed on the substrate to precisely control crystallization position, then manufacturing precision is improved, but the device complexity increases due to additional fabrication steps

Engineering Contradiction:
Improveposition control of crystallization and active layer formationVSAvoidfabrication process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies segmentation by dividing the substrate into distinct functional regions: alignment mark regions and active device regions. The alignment marks are formed as separate, discrete structures on the substrate that serve solely as positioning references. This segmentation allows the alignment function to be independently optimized without interfering with the active device fabrication, and the additional complexity is localized to specific areas rather than affecting the entire device structure.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach results in improved uniformity of thin film transistor characteristics, such as S-factor and off current, and achieves uniform luminance even in larger panel sizes.

Implementation Method 1

using a catalytic metal to control the crystallization of amorphous silicon into polysilicon

Methodology Applied
Scientific EffectCrystallization: Crystallisation

Data Source

PatentUS7910919B2Organic light emitting display and fabricating method thereof
Publication Date: 2011.03.22 SAMSUNG DISPLAY CO LTD
  • US7910919B2 patent drawing
  • US7910919B2 patent drawing
  • US7910919B2 patent drawing

AI summary

An organic light emitting display and a fabricating method thereof in which an alignment mark is formed in the non-display region. The organic light emitting display includes a substrate having a display region and a non-display region; a buffer layer formed the overall substrate; a gate insulating layer; a gate electrode formed on the gate insulating layer corresponding to the active layer; an interlayer dielectric layer formed on the gate insulating layer; a source/drain electrode formed on the interlayer dielectric layer and electrically coupled to the active layer; an insulating layer formed on the source/drain electrode; and an organic light emitting diode formed on the insulating layer and electrically coupled to the source/drain electrode. Further, the organic light emitting display includes an alignment mark formed on one of the substrate and the buffer layer.