Analysis Circuit Reduces DC Current in OLED Amplifiers

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Solution Overview

Problem

Current display devices using the demultiplexing driving method for OLED panels consume high current in amplifiers and DACs, especially during all black display periods, which affects power efficiency without significantly impacting image quality.

Innovation Solution

Incorporating an analysis circuit that reduces direct current flow in amplifiers and DACs by determining gradation levels, allowing for reduced current consumption during low brightness or black display conditions, and optimizing the number of amplifiers and DACs by converting gradation data in blocks rather than per data line.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If the demultiplexing driving method is used to reduce the number of amplifiers and DACs, then device complexity is reduced, but current consumption increases

Engineering Contradiction:
Improvenumber of amplifiers and DACsVSAvoidcurrent consumption
Core Design Contradiction:
Device complexityVSUse of energy by moving object

Solution Approach 1:

The patent applies dynamics by making the amplifier and DAC operational states variable rather than fixed. The analysis circuit dynamically determines whether each amplifier and DAC should be in high-current or low-current operation mode based on the actual gradation data being processed. This allows the system to adapt its power consumption to the actual display requirements, resolving the contradiction between using fewer components (lower complexity) and maintaining low power consumption.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the operational parameters of the amplifiers and DACs based on the gradation level of the display content. When processing low-gradation data (black or dark images), the system switches these components to a low-current operation mode with reduced current supply. This parameter change allows the same hardware components to operate efficiently across different power consumption states, addressing the contradiction between component reduction and power efficiency.

Inventive Principle:
Principle #35Parameter changes

2Use of energy by moving object

If current is reduced in amplifiers and DACs during black display periods, then power efficiency improves, but image quality may be affected

Engineering Contradiction:
Improvepower efficiencyVSAvoidimage quality
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The patent implements feedback through the analysis circuit that continuously monitors the gradation data before it reaches the amplifiers and DACs. Based on this feedback information about the display content (whether it's black, dark, or bright), the system adjusts the current supply to each component. This closed-loop control ensures that power consumption is reduced only when appropriate (during black/dark display periods), while maintaining full power and thus image quality when needed.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent applies preliminary action by having the analysis circuit examine the gradation data in advance before it is processed by the amplifiers and DACs. This allows the system to pre-determine the appropriate current level for each component based on the upcoming display content. By taking this preliminary action, the system can switch to low-power mode just in time for black/dark periods without compromising image quality during bright periods.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10431161B2Display device and electronic apparatus having analysis circuit analyzing gradation data
Publication Date: 2019.10.01 SEIKO EPSON CORP
  • US10431161B2 patent drawing
  • US10431161B2 patent drawing
  • US10431161B2 patent drawing

AI summary

A display device includes a plurality of latch circuits which latch gradation data that is used to drive a plurality of data lines, a plurality of D/A converters which convert gradation data that is latched to the plurality of latch circuits to a plurality of analog signals, a plurality of amplifiers which generate a plurality of gradation signals by respectively amplifying the plurality of analog signals output from the plurality of D/A converters, and an analysis circuit that analyzes gradation data that is latched to the plurality of latch circuits and reduces direct current that flows in at least one amplifier or at least one D/A converter according to an analysis result.