OLED Anode Vent Holes for Parasitic Capacitance Balancing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In organic light-emitting diode (OLED) display panels, particularly active matrix driving OLED (AMOLED) panels, uneven parasitic capacitances between the common power line and signal lines cause signal mismatch, leading to non-uniformity and abnormal display images, especially at higher frequencies.
Innovation Solution
The implementation of a display substrate with a common power line featuring vent holes arranged in a specific pattern to ensure equal overlapping areas with signal lines, balancing parasitic capacitances and ensuring synchronized signal transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If vent holes are formed in the common power line to exhaust gases during PLN preparation, then gas exhaust capability is improved, but parasitic capacitance between the common power line and signal lines increases causing signal mismatch
Solution Approach 1:
The patent applies local quality by making the vent holes have different overlapping areas with different signal lines. Specifically, the overlapping area between the vent hole and the first signal line is designed to be different from the overlapping area between the vent hole and the second signal line. This creates non-uniform parasitic capacitance distribution that compensates for the inherent capacitance differences in the signal lines, thereby balancing the overall parasitic capacitance values and eliminating signal mismatch.
Solution Approach 2:
The patent changes the geometric parameters of the vent holes, specifically their positions and sizes, to control the overlapping areas with different signal lines. By adjusting these parameters, the parasitic capacitance values between the common power line and different signal lines are tuned to achieve uniformity, thus resolving the signal mismatch problem while maintaining gas exhaust functionality.
2Reliability
If the overlapping areas between vent holes and signal lines are made equal to balance parasitic capacitances, then signal transmission uniformity is improved, but the design complexity of the common power line increases
Solution Approach 1:
The patent employs asymmetry by intentionally designing vent holes with asymmetric overlapping areas relative to different signal lines. Rather than creating symmetric equal overlaps, the design accepts asymmetric configurations that result in balanced parasitic capacitances. This asymmetric approach simplifies the overall design by not requiring complex symmetric arrangements while still achieving the goal of uniform signal transmission.
Data Source
AI summary
Provided is a display substrate, the display substrate is provided with a display area and a peripheral area around the display area, and includes a source/drain layer and an anode layer, wherein in the peripheral area, the source/drain layer includes pairs of first signal lines configured to drive circuits, and the pairs of first signal lines include clock signal lines and gate drive lines; and the anode layer includes a common power line provided with vent holes; and overlapping areas between two first signal lines in any pair of the first signal lines and a projection pattern of the vent hole are equal, the projection pattern of the vent hole being a pattern of an orthographic projection of the vent hole in the common power line onto the source/drain layer. A display panel and a display device are also provided.