OLED Array Substrate Layout for Uniform Brightness and High PPI
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Solution Overview
Problem
In OLED display panels, the simultaneous activation of multiple pixel columns from the same row due to shared scan signal lines leads to uneven charging and discharging methods, resulting in uneven display brightness and affecting display quality. Additionally, the increased number of signal lines and wirings reduce pixels per inch (PPI) and necessitate larger display panel frames.
Innovation Solution
The array substrate design includes pairs of scan signal lines and driving reset control signal lines that alternate between columns, allowing each sub-pixel to receive distinct scan and reset signals, ensuring synchronized turn-on times and uniform charging, while reducing the number of signal lines by sharing some lines, thus enhancing display quality and reducing panel frame size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If multiple pixel columns share the same scan signal line, then the number of signal lines is reduced, but uneven charging and discharging occurs resulting in uneven display brightness
Solution Approach 1:
The scan signal lines are segmented into multiple independent lines (first scan signal line and second scan signal line) that alternately control different pixel columns. This segmentation allows each pixel column to be charged and discharged independently, eliminating the uneven brightness caused by shared signal lines while maintaining a reasonable number of signal lines through the alternating pattern.
2Manufacturing precision
If the number of signal lines is increased to ensure synchronized turn-on times, then display quality is improved, but pixels per inch (PPI) is reduced and panel frame size increases
Solution Approach 1:
The pixel array is segmented into odd-numbered and even-numbered columns that are controlled by different scan signal lines. This segmentation enables synchronized turn-on times for all pixels in a row through coordinated control of the alternating signal lines, improving display quality without requiring a proportional increase in the total number of signal lines.
Solution Approach 2:
The scan signal lines operate in a periodic alternating pattern where the first scan signal line controls odd columns during one period and the second scan signal line controls even columns during the next period. This periodic action ensures synchronized turn-on times across all columns while maintaining a compact signal line structure that preserves high PPI.
3Manufacturing precision
If the number of signal lines is increased to ensure synchronized turn-on times, then display quality is improved, but panel frame size increases
Solution Approach 1:
The scan signal lines are segmented into multiple independent lines (first scan signal line and second scan signal line) that alternately control different pixel columns. This segmentation allows each pixel column to be charged and discharged independently, eliminating the uneven brightness caused by shared signal lines while maintaining a reasonable number of signal lines through the alternating pattern.
Data Source
AI summary
The embodiments of the present disclosure provide an array substrate and a related display panel and a related display device. An array substrate includes a plurality of pairs of scan signal lines. A first scan signal line of the m-th pair of scan signal lines is configured to provide a first scan signal to a sub-pixel in a (2n−1)-th column from sub-pixels in the m-th. And a plurality of pairs of driving reset control signal lines. A second driving reset control signal line of the m-th pair of driving reset control signal lines is configured to provide a second driving reset control signal to the sub-pixel in the 2n-th column from the sub-pixels in the m-th row. The m and n are integers greater than or equal to 1. In the embodiments of the present disclosure, the first scan signal line of the m-th pair of scan signal lines and the second driving reset control signal line of the m-th pair of driving reset control signal lines are the same signal line.


