OLED Display Panel Auxiliary Cathode Structure
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The existing OLED display panel manufacturing processes face challenges in achieving high-resolution displays with top emission, as common electrodes made from materials like magnesium, silver, or indium zinc oxide have high resistance and voltage drop issues, leading to difficulties in designing auxiliary cathode wirings and potential short circuits, which affect yield and display efficiency.
Innovation Solution
The OLED display panel design incorporates auxiliary cathodes with a black matrix, buffer layer, and metal layer on a cover substrate, along with a planarization layer and spacers, which reduces parasitic resistance and improves conductivity by increasing the contact area between transparent conductive layers and metal layers, and uses materials like IZO and silver for enhanced adhesion and reduced shading.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If common electrodes made from magnesium, silver, or indium zinc oxide are used, then the display can be manufactured with standard materials, but the resistance is high and voltage drop occurs
Solution Approach 1:
The patent uses a composite electrode structure combining IZO (indium zinc oxide) layer and silver layer. The IZO layer provides good adhesion to the underlying substrate, while the silver layer provides low electrical resistance. This composite structure resolves the contradiction by achieving both ease of manufacture with standard materials and high electrical conductivity through material composition.
2Reliability
If auxiliary cathode wirings are designed to reduce resistance, then the conductivity improves, but the design complexity increases and short circuit risks arise
Solution Approach 1:
The patent merges the auxiliary cathode function with the color filter substrate by forming the auxiliary cathode wirings on the same substrate as the color filters. This integration reduces the need for separate wiring layers and simplifies the overall structure, resolving the contradiction between improving conductivity and reducing design complexity.
Solution Approach 2:
The patent introduces a buffer layer as an intermediary between the black matrix and the metal layer of the auxiliary cathode. This buffer layer facilitates better adhesion and electrical contact, improving conductivity without requiring complex wiring designs, thus resolving the contradiction between reliability and device complexity.
3Reliability
If the contact area between transparent conductive layers and metal layers is increased, then parasitic resistance decreases and conductivity improves, but the manufacturing precision requirements increase
Solution Approach 1:
The patent forms the buffer layer and black matrix structure before depositing the metal layer of the auxiliary cathode. This preliminary structuring creates a well-defined foundation that guides the metal layer deposition, ensuring uniform contact area and reducing the precision requirements during subsequent manufacturing steps, thus resolving the contradiction between improving conductivity and maintaining manufacturing precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enhances the display efficiency and yield by reducing voltage drop and shading, improving the conductivity and adhesion of metal layers, and simplifies the manufacturing process, resulting in higher-quality high-definition images.
Implementation Method 1
reduces parasitic resistance and improves conductivity by increasing the contact area between transparent conductive layers and metal layers
Implementation Method 2
uses materials like IZO and silver for enhanced adhesion
Data Source
Figure 1
Figure 2
Figure 3
AI summary
An OLED display panel includes a cover (1) and a backplane (2), a plurality of color filter (CF) units (12) are arranged in an array on the cover (1); auxiliary cathodes (11) are filled into gaps among the CF units (12); a planarization layer (13) is disposed on the auxiliary cathodes (11) and the CF units (12); a plurality of openings (131) are disposed in the planarization layer (13) at locations corresponding to the auxiliary cathodes (11); a plurality of spacers (14) are disposed on the planarization layer (13) at locations corresponding to the auxiliary cathodes (11); a transparent electrode layer (15) is disposed on the planarization layer (13) and the spacers (14) and is communicated with the auxiliary cathodes (11) via the openings (131); and the plurality of CF units (12) of the cover (1) and pixel regions (21) of the backplane (2) are oppositely arranged.