OLED Display Panel Buffer Area Line Density Management
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Solution Overview
Problem
In OLED display manufacturing, defects occur due to differences in line density between the display area and the peripheral area, leading to patterning issues during the formation of lines, particularly when forming power supply lines and switching elements.
Innovation Solution
A display panel design that includes a buffer area between the display and peripheral areas, with power connecting lines and a dummy active pattern in the buffer area to manage line density differences, and a method of manufacturing that forms these elements on a substrate with specific insulation and electrode layers to prevent over-development and improve uniformity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If power supply lines are formed in the peripheral area with high line density, then power distribution is improved, but patterning defects occur due to line density difference with the display area
Solution Approach 1:
The patent introduces a buffer area as an intermediary zone between the display area and peripheral area. This buffer area contains dummy patterns that act as a transition region, gradually adjusting the line density from the high-density peripheral area to the lower-density display area, thereby preventing patterning defects caused by abrupt density changes
Solution Approach 2:
The patent applies different line density characteristics to different regions: the peripheral area maintains high line density for power distribution, the display area maintains appropriate line density for pixel formation, and the buffer area in between implements a gradual transition with dummy patterns to locally adjust density and prevent defects
2Ease of manufacture
If developer is injected for forming lines, then line formation is achieved, but over-development occurs in lines adjacent to power supply lines due to line density difference
Solution Approach 1:
The patent places dummy patterns in the buffer area beforehand to cushion the abrupt line density transition. These dummy patterns prevent excessive developer infiltration into the display area during the line formation process, thereby preventing over-development of lines adjacent to power supply lines
Data Source
AI summary
A display panel includes a substrate including a display area, a peripheral area and a buffer area disposed between the display area and the peripheral area. The display panel further includes a switching element disposed in the display area. The switching element includes an active pattern, a gate electrode overlapping the active pattern, a source electrode connecting with the active pattern, and a drain electrode spaced apart from the source electrode. The display panel further includes a power supply line disposed in the peripheral area and disposed on a same layer as the source electrode and the drain electrode. The display panel additionally includes a power connecting line disposed in the buffer area and connecting the switching element to the power supply line. The display panel further includes a dummy active pattern disposed in the buffer area and overlapping the power connecting line.