OLED Display Capacitor Overlap for Voltage Stability

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Solution Overview

Problem

High-resolution organic light emitting diode (OLED) displays face challenges in maintaining sufficient storage capacitance due to the complex pixel structure and limited space for forming capacitors, leading to potential voltage fluctuations and display quality issues.

Innovation Solution

The implementation of additional capacitors, such as the first and second additional capacitors Ca and Cb, which overlap the driving voltage and low voltage lines, respectively, to increase the capacitance in a narrow area, and a dual-layered structure for the driving low voltage line to eliminate voltage drops, ensuring stable voltage transmission.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the resolution of OLED display is increased, then the display quality is improved, but the pixel area is reduced making it difficult to provide sufficient space for forming storage capacitors

Engineering Contradiction:
Improvedisplay resolutionVSAvoidpixel area
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The patent utilizes the vertical dimension by forming the storage capacitor in an overlapping configuration where the first electrode extends in the first direction and the second electrode is positioned above it in the vertical direction. This three-dimensional arrangement allows the capacitor to occupy vertical space rather than only horizontal plane area, effectively increasing capacitance without consuming additional pixel area.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The storage capacitor structure is integrated within the pixel structure by positioning the capacitor electrodes among other pixel components. The first electrode is formed in the same layer as or integrated with existing pixel structures, and the second electrode is positioned above, creating a nested arrangement that maximizes space utilization within the constrained pixel area.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Reliability

If the storage capacitor area is increased to maintain sufficient capacitance, then the voltage stability is improved, but the pixel area consumption increases reducing the available space for other pixel components

Engineering Contradiction:
Improvevoltage stabilityVSAvoidcapacitor area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The overlapping capacitor configuration utilizes the vertical dimension to increase capacitance. By positioning the second electrode above the first electrode with a gate insulating layer in between, the capacitor achieves sufficient capacitance value without requiring large planar area, thus maintaining voltage stability while preserving pixel area for other components.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent changes the geometric parameters of the capacitor by extending the first electrode in the first direction and positioning the second electrode to overlap it in the vertical direction. This parameter change from a planar to a three-dimensional configuration increases the effective capacitance area without proportionally increasing the pixel area occupation.

Inventive Principle:
Principle #35Parameter changes

3Ease of manufacture

If the pixel structure is simplified to reduce manufacturing complexity, then the ease of manufacture is improved, but the display resolution and performance are reduced

Engineering Contradiction:
Improvemanufacturing complexityVSAvoiddisplay resolution
Core Design Contradiction:
Ease of manufactureVSMeasurement precision

Solution Approach 1:

The gate insulating layer serves multiple functions: it acts as the insulating layer for the transistor gate structure and simultaneously serves as the dielectric layer for the storage capacitor. This multi-functionality reduces the total number of separate layers and manufacturing steps while maintaining high-resolution display capabilities.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges the transistor gate structure with the storage capacitor structure by using the same gate insulating layer for both. The first electrode is formed in the same layer as or integrated with the transistor structure, combining multiple functional elements into a unified structure that simplifies manufacturing while achieving high resolution.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution enhances the display quality by maintaining stable voltage for each pixel, reducing crosstalk, and improving the overall performance of high-resolution OLED displays.

Implementation Method 1

the anode forms a parasitic capacitance with the first gate insulating layer or the first data layer

Methodology Applied
Scientific EffectParasitic capacitance: Parasitic Capacitance

Implementation Method 2

an organic emission layer disposed on the anode

Methodology Applied
Scientific EffectElectroluminescence: Electroluminescence

Data Source

PatentUS11430849B2Organic light emitting diode display
Publication Date: 2022.08.30 SAMSUNG DISPLAY CO LTD
  • US11430849B2 patent drawing
  • US11430849B2 patent drawing
  • US11430849B2 patent drawing

AI summary

According to an exemplary embodiment, an organic light emitting diode display includes: a substrate; a semiconductor layer; a first gate insulating layer disposed on the oxide semiconductor layer; a first gate layer disposed on the first gate insulating layer; a first interlayer insulating layer disposed on the first gate layer; a first data layer disposed on the first interlayer insulating layer; a second interlayer insulating layer disposed on the first data layer; a driving voltage line and a driving low voltage line disposed on the second interlayer insulating layer and separated from each other; an upper insulating layer covering the driving voltage line and the driving low voltage line; and an anode disposed on the upper insulating layer and overlapping the driving voltage line or the driving low voltage line.