OLED Storage Capacitor Layout for Overlay-Resistant Pixels

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Solution Overview

Problem

In organic light emitting diode (OLED) display devices, overlay changes due to nonuniform exposure during the photolithography process can lead to uneven storage capacitance, resulting in nonuniform current flow and spot generation in pixels.

Innovation Solution

The OLED display device incorporates a storage capacitor design with a second storage electrode offset from the first storage electrode, featuring a storage compensator that maintains capacitance stability even with overlay changes, and is formed on the same layer as the data and driving voltage lines to reduce manufacturing complexity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a conventional storage capacitor design with aligned electrodes is used, then the manufacturing process is simple, but the storage capacitance becomes nonuniform due to overlay changes during photolithography

Engineering Contradiction:
Improvestorage capacitance uniformityVSAvoidcapacitor structure complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies asymmetry by intentionally offsetting the second storage electrode from the first storage electrode in the storage capacitor structure. This asymmetric arrangement compensates for overlay changes during photolithography, ensuring that the storage capacitance remains uniform across different pixels even when alignment varies. The offset distance is specifically designed to counteract the expected overlay error, transforming the alignment sensitivity into a robust design.

Inventive Principle:
Principle #4Asymmetry

2Manufacturing precision

If the second storage electrode is offset from the first storage electrode to compensate for overlay changes, then storage capacitance uniformity is improved, but the alignment precision requirements increase

Engineering Contradiction:
Improvestorage capacitance uniformityVSAvoidelectrode alignment precision
Core Design Contradiction:
Manufacturing precisionVSMeasurement precision

Solution Approach 1:

The patent implements preliminary anti-action by pre-calculating and pre-setting the offset distance between the first and second storage electrodes based on expected overlay changes. This preliminary compensation action counteracts the harmful effect of overlay errors before they affect the final product. By designing the capacitor with this built-in offset, the system proactively neutralizes the alignment precision requirements, making the storage capacitance uniform without demanding extremely precise alignment during manufacturing.

Inventive Principle:
Principle #9Preliminary anti-action

3Adaptability or versatility

If the storage capacitor electrodes are formed on separate layers, then the design flexibility is high, but the manufacturing complexity and process steps increase

Engineering Contradiction:
Improvecapacitor design flexibilityVSAvoidmanufacturing process simplicity
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The patent applies merging by forming both the first storage electrode and the second storage electrode on the same layer during the photolithography process. This consolidation reduces the number of manufacturing steps and simplifies the production process while maintaining the beneficial offset configuration. The electrodes are created in a single exposure and development cycle, eliminating the need for separate layer formation and reducing overall manufacturing complexity.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS11765938B2Organic light emitting diode display device for reducing defects due to an overlay change
Publication Date: 2023.09.19 SAMSUNG DISPLAY CO LTD
  • US11765938B2 patent drawing
  • US11765938B2 patent drawing
  • US11765938B2 patent drawing

AI summary

An organic light emitting diode display device includes: a substrate; a scan line configured to transfer a scan signal; a data line and a driving voltage line configured to transfer a data voltage and a driving voltage, respectively; a switching transistor including a switching drain electrode configured to output the data voltage; a driving transistor including a driving gate electrode connected with the switching drain electrode; a storage capacitor including a first storage electrode connected with the driving gate electrode and a second storage electrode connected with the driving voltage line; and an organic light emitting diode connected with a driving drain electrode of the driving transistor. The storage capacitor includes: a connector in which an edge of the second storage electrode is offset from an edge of the first storage electrode in a direction toward the center of the second storage electrode, and a storage compensator facing the connector.