OLED Display Capacitor Shielding for Stable Pixel Gray Levels
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Solution Overview
Problem
In OLED displays, parasitic capacitance between data lines and capacitor plates causes voltage changes, leading to abnormalities in pixel gray levels and displayed images due to capacitive coupling.
Innovation Solution
The introduction of a first shielding portion between the second capacitor plate and the first data line reduces parasitic capacitance by shielding capacitive coupling, thereby minimizing the impact of voltage changes on the gate of the driving thin film transistor.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the data line and capacitor plate are disposed close to each other to save space, then the device area is reduced, but parasitic capacitance increases causing voltage changes and image abnormalities
Solution Approach 1:
A shielding portion is introduced as an intermediary element disposed between the data line and the capacitor plate. This shielding portion acts as a mediator that blocks the capacitive coupling between the data line and capacitor plate, reducing parasitic capacitance while allowing the components to remain in close proximity for space efficiency.
Solution Approach 2:
The solution moves from a two-dimensional planar arrangement to a three-dimensional structure by adding the shielding portion that extends in the vertical direction (thickness direction of the substrate). This dimensional change allows the shielding portion to effectively intercept electric field lines between the data line and capacitor plate without increasing the horizontal footprint area.
2Device complexity
If the capacitor plate is integrated with the gate of the driving TFT to simplify structure, then the device complexity is reduced, but voltage stability deteriorates due to parasitic capacitance coupling
Solution Approach 1:
The shielding portion serves as a mediator that decouples the electrical interaction between the integrated gate-capacitor structure and the data line. This allows the beneficial integration of the capacitor plate with the gate (simplifying structure) while preventing the harmful voltage fluctuations caused by parasitic capacitance.
3Reliability
If the shielding portion is added to reduce parasitic capacitance, then voltage stability is improved, but the device complexity and manufacturing steps increase
Solution Approach 1:
The shielding portion is merged with existing structural elements where possible. For example, the shielding portion can be integrated with the pixel electrode or other existing components, thereby providing the shielding function without adding completely separate structural elements that would increase complexity.
Solution Approach 2:
The shielding portion is designed to serve multiple functions: it provides electrical shielding against parasitic capacitance, can serve as part of the pixel electrode structure, and may contribute to the overall mechanical support of the display stack. This multi-functionality reduces the need for additional dedicated components.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively improves the stability of pixel gray levels and image quality by reducing the influence of voltage changes on the gate of the driving thin film transistor, enhancing the overall performance of OLED displays.
Implementation Method 1
Parasite capacitance is formed between the data line and the capacitor plate integrated with the gate of the driving TFT
Implementation Method 2
a first shielding portion which is disposed at least partially between the second capacitor plate and the first data line
Data Source
AI summary
An organic light emitting diode display substrate, comprises: a base substrate, and a first data line, a driving thin film transistor and an energy storage capacitor, wherein the energy storage capacitor comprises a first capacitor plate and a second capacitor plate disposed opposite to each other, and the second capacitor plate is electrically connected to a gate of the driving thin film transistor, in a direction away from the base substrate, the first capacitor plate is disposed between the first data line and the second capacitor plate. The display substrate further comprises a power line and a voltage equalizing line which are electrically connected, the power line extends in a first direction which is substantially parallel to a direction in which the first data line extends, and the voltage equalizing line extends in a second direction. A method of manufacturing the display substrate and a display device are also provided.