OLED Array Substrate Capacitor Stack for High Capacitance Density
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Solution Overview
Problem
Existing OLED panel designs face challenges in achieving high capacitance without increasing the number of manufacturing processes or occupying excessive sub-pixel area, which affects the luminance and resolution of the display.
Innovation Solution
The array substrate incorporates a first capacitor with a dielectric layer comprising a high dielectric constant first sub-layer and a low dielectric constant second sub-layer, positioned in the capacitor area and extending into the pixel area, allowing for increased capacitance while maintaining a compact design.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a dual-layer or multi-layer capacitor structure is provided to increase capacitance, then the capacitance value is improved, but the number of manufacturing processes is increased
Solution Approach 1:
The dielectric layer is segmented into two sub-layers with different dielectric constants. The first dielectric sub-layer has a higher dielectric constant than the second dielectric sub-layer. This segmentation allows the capacitor to achieve higher capacitance without requiring multiple separate capacitor structures, thus avoiding an increase in manufacturing process complexity while improving the capacitance value.
2Quantity of substance
If the relative area of two plates of a capacitor is increased to increase capacitance, then the capacitance value is improved, but the sub-pixel area is increased
Solution Approach 1:
Instead of increasing the plate area to increase capacitance, this invention changes the dielectric parameter (dielectric constant) by using a multi-layer dielectric structure with different dielectric constants. The first dielectric sub-layer has a higher dielectric constant than the second dielectric sub-layer, which increases the capacitance density. This allows the capacitor to achieve higher capacitance within the same sub-pixel area, avoiding the need to expand the sub-pixel area.
3Area of stationary object
If the storage capacitor is made too small, then the manufacturing process area is reduced, but the luminance of the light-emitting device is reduced
Solution Approach 1:
The dielectric layer is constructed as a composite structure with two sub-layers having different dielectric constants. The first dielectric sub-layer has a higher dielectric constant than the second dielectric sub-layer. This composite dielectric structure increases the capacitance density, allowing the storage capacitor to maintain sufficient capacitance value while occupying a smaller area. Consequently, the luminance is preserved without requiring a large capacitor area.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively enhances the capacitance value of the capacitor, reducing the risk of reduced luminance and supporting the production of high-resolution display products with a reduced number of manufacturing processes.
Implementation Method 1
dielectric constant of the first dielectric sub-layer being greater than dielectric constant of the second dielectric sub-layer
Data Source
AI summary
An array substrate includes: a substrate having a pixel area and a capacitor area; a first thin film transistor disposed in the pixel area on the substrate and including a first active layer, a first gate layer and a first source-drain layer; and a first capacitor including a first plate, a second plate and a first dielectric layer disposed therebetween. The first plate and the second plate are disposed respectively in different layers in the capacitor area. The first dielectric layer includes a first dielectric sub-layer having a greater dielectric constant, and a second dielectric sub-layer that has a less dielectric constant and is disposed on a side of the first dielectric sub-layer close to the first active layer and in the pixel area and the capacitor area.