OLED Display Charge Trap Layer Composition for Luminance Stability
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Solution Overview
Problem
Current display devices face challenges in improving the element characteristics of semiconductor elements for driving light emitting elements, particularly in organic light emitting display devices, which affect luminance and afterimages.
Innovation Solution
The implementation of a display device structure that includes a first charge trap layer with silicon nitride and a semiconductor layer with specific active layers for transistors, where the ratio of Si to N elements in the charge trap layer is optimized, and a second charge trap layer with silicon oxide, enhancing the trapping of charge and improving transistor performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional charge trap layers are used in organic light emitting display devices, then the basic device structure is maintained, but the element characteristics of semiconductor elements are insufficient, resulting in poor luminance and afterimage performance
Solution Approach 1:
The patent optimizes the Si:N ratio parameter in silicon nitride charge trap layers to be between 1.6:1 and 2.5:1, and controls N-H bond content in silicon oxide layers to be 0.7-1.5 at%. These parameter changes improve charge trapping efficiency and transistor characteristics without fundamentally changing the device structure
Solution Approach 2:
The patent employs composite charge trap layer structures combining silicon nitride and silicon oxide materials. This composite approach leverages the complementary properties of both materials to enhance charge trapping performance and improve semiconductor element characteristics
2Illumination intensity
If the Si:N ratio in silicon nitride charge trap layer is not optimized, then the manufacturing process is simpler, but the driving current and luminance of the display device are insufficient
Solution Approach 1:
The patent specifies precise Si:N ratio ranges (1.6:1 to 2.5:1) for silicon nitride charge trap layers to optimize charge trapping efficiency. This parameter optimization directly improves driving current and luminance output of the display device
3Object-affected harmful factors
If N-H bond content in silicon oxide charge trap layer is not controlled, then the manufacturing process is less complex, but afterimages are reduced
Solution Approach 1:
The patent controls N-H bond content in silicon oxide charge trap layers to be within 0.7-1.5 at%. This parameter control reduces afterimage effects by optimizing the charge trapping and release characteristics of the semiconductor elements
4Productivity
If charge trap layers with optimized characteristics are implemented, then transistor performance and light efficiency are improved, but the device structure becomes more complex
Solution Approach 1:
The patent applies charge trap layers with specific compositions and properties only in critical regions where charge trapping is needed for transistor operation. This localized approach improves light efficiency without unnecessarily complicating the entire device structure
Solution Approach 2:
The charge trap layers serve multiple functions: they trap charges to improve transistor characteristics, enhance driving current, improve luminance, and reduce afterimages. This multi-functionality justifies the added structural complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the driving current and luminance of the display device, reduces afterimages, and simplifies the manufacturing process by optimizing the element characteristics of the transistors, leading to improved light efficiency and image quality.
Implementation Method 1
a first charge trap layer disposed on the first substrate and including silicon nitride
Implementation Method 2
a second charge trap layer disposed on the second substrate and including silicon oxide
Implementation Method 3
an organic light emitting element electrically connected to the first transistor
Data Source
AI summary
A display device is provided. The display device includes a first substrate, a first charge trap layer disposed on the first substrate and including silicon nitride, a semiconductor layer disposed on the first charge trap layer and including a first active layer of a first transistor and a second active layer of a second transistor, and an organic light emitting element electrically connected to the first transistor, wherein a ratio of a content of a Si element to a content of an N element in the first charge trap layer is in a range of 1.6 to 2.5.


