OLED Panel Data Line Layering for Crosstalk Reduction
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Solution Overview
Problem
Conventional OLED display panels face challenges in achieving high resolution due to limitations in reducing the pitch between adjacent data lines, leading to issues such as crosstalk and short circuits, which hinder the production of high-resolution displays.
Innovation Solution
The OLED display panel design features data lines on different structural layers, with each pixel group connected to the same power line in mirror symmetry, allowing for a doubled distance between adjacent data lines on the same layer without reducing pixel area, and utilizing an interlayer insulative layer to isolate data lines on different layers, thereby reducing the probability of short circuits and crosstalk.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the pitch between adjacent data lines is reduced to increase resolution, then the pixels per inch (PPI) increases, but the probability of crosstalk and short circuits between data lines increases
Solution Approach 1:
The patent transitions from a planar arrangement where all data lines are on the same layer to a three-dimensional stacked arrangement where data lines are distributed across multiple layers. This vertical dimensionality change allows data lines to be separated in the Z-direction while maintaining high horizontal density, thereby increasing PPI without proportionally increasing crosstalk and short circuit risks.
Solution Approach 2:
The patent segments the data line network into multiple independent layers, with each layer containing a subset of data lines. This segmentation distributes the electrical signals across separate physical planes, reducing mutual inductance and capacitance between adjacent data lines. The insulative layers between data line layers further isolate these segmented conductors, eliminating crosstalk while enabling higher spatial density.
2Manufacturing precision
If the pitch between adjacent data lines is reduced to increase resolution, then the pixels per inch (PPI) increases, but the exposure limitation of lithography machines makes it difficult to further reduce the pitch
Solution Approach 1:
Instead of continuing to reduce the horizontal pitch between data lines within the XY-plane (which is constrained by lithography exposure limits), the patent moves data lines into the vertical Z-dimension by stacking them on multiple layers. This allows the effective pitch to be reduced without requiring further reduction of the lithography exposure wavelength, as the layer separation provides additional spatial resolution that bypasses the two-dimensional lithography constraint.
3Device complexity
If data lines are disposed on the same structural layer, then the structure is simple, but it is difficult to reduce the pitch between adjacent data lines and avoid crosstalk
Solution Approach 1:
The patent resolves the conflict between structural simplicity and crosstalk prevention by introducing a vertical dimension. Data lines are arranged on multiple stacked layers separated by insulative barriers, creating a three-dimensional configuration. This maintains relative structural simplicity through repetitive layering patterns while effectively eliminating crosstalk through vertical isolation, as data lines on different layers are separated by insulative material in the Z-direction.
Data Source
AI summary
Provided are an OLED (Organic Light-Emitting Diode) display panel and a manufacturing method thereof. The OLED display panel comprises a plurality of scan lines (Sn), data lines (D1 and D2), and power lines (VDD), wherein the scan lines (Sn) and the data lines (D1 and D2) define a plurality of pixel groups arranged in a matrix; wherein each pixel group has two sub-pixels, two sub-pixels in a same pixel group connected to a same power line (VDD) and arranged in mirror symmetry with respect to the power line (VDD), and wherein the data lines (D1 and D2) connected to the two sub-pixels in the same pixel group are located on different structural layers. On one hand, the probability of occurrence of a short circuit between the data lines (D1 and D2) is effectively reduced, and crosstalk between the data lines (D1 and D2) is significantly eliminated. On the other hand, the pixel area can be reduced based on existing apparatuses and process conditions, improving the PPI of the OLED display panel, and enhancing the resolution of the OLED display panel.


