OLED Display Panel Parasitic Capacitance Shielding

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Solution Overview

Problem

In OLED display panels, the uniformity of light-emitting brightness is compromised due to parasitic capacitance generated by coupling between sub-pixel electrodes and driving circuit elements, affecting display quality.

Innovation Solution

A display panel design that includes a first light-emitting element, a driving transistor, a conductive line unit, and a power supply structure, where the power supply structure is positioned between the conductive line unit and the electrode, shielding the conductive line and preventing parasitic capacitance by covering its orthographic projection on the substrate, ensuring stable signal supply and uniform light emission.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If sub-pixels in various structures are designed on the display panel, then the display panel can satisfy various user demands, but the uniformity of light-emitting brightness of the sub-pixels deteriorates due to parasitic capacitance from coupling between electrodes and driving circuit elements

Engineering Contradiction:
Improvedisplay panel adaptabilityVSAvoidlight-emitting brightness uniformity
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

A conductive line unit is introduced as an intermediary component between the first electrode and the first gate. This conductive line unit serves as a mediator to reduce parasitic capacitance coupling between the electrode and driving circuit elements, thereby improving brightness uniformity while maintaining various sub-pixel structure designs

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The parasitic capacitance problem is addressed by extracting the coupling path between the first electrode and first gate, and replacing it with a dedicated conductive line unit that has optimized electrical characteristics, thus separating the functional connections from the parasitic effects

Inventive Principle:
Principle #2Taking out (Extraction)

2Measurement precision

If high pixel density is maintained with various sub-pixel structures, then the display resolution is improved, but the parasitic capacitance from coupling between electrodes and driving circuits increases, affecting display quality

Engineering Contradiction:
Improvedisplay resolutionVSAvoidparasitic capacitance
Core Design Contradiction:
Measurement precisionVSObject-generated harmful factors

Solution Approach 1:

The conductive line unit acts as an intermediary that reduces parasitic capacitance effects in high-density pixel arrangements, enabling higher resolution displays without the detrimental coupling effects that would otherwise increase with greater device integration

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design enhances display uniformity and improves the overall display effect by preventing parasitic capacitance, ensuring consistent brightness across light-emitting elements and maintaining high pixel density while allowing for under-screen integration of photosensitive components.

Implementation Method 1

a generation of the parasitic capacitance due to the coupling between the first electrode and the first conductive line unit is prevented

Methodology Applied
Scientific EffectParasitic capacitance: Parasitic Capacitance

Data Source

PatentUS11937473B2Display panel and display apparatus
Publication Date: 2024.03.19 KUNSHAN GO VISIONOX OPTO ELECTRONICS CO LTD
  • US11937473B2 patent drawing
  • US11937473B2 patent drawing
  • US11937473B2 patent drawing

AI summary

The display panel includes a first display area, and the display panel includes: a substrate; a first light-emitting element disposed on the substrate and disposed in the first display area; a first driving transistor disposed between the substrate and the first light-emitting element, the first driving transistor being electrically connected with the first light-emitting element and including a first gate; a first conductive line unit electrically connected with the first gate and disposed on a side of the first gate away from the substrate; and a first power supply structure electrically connected with a first electrode of the first light-emitting element and disposed between the first conductive line unit and the first electrode of the first light-emitting element, an orthographic projection of the first power supply structure on the substrate covering an orthographic projection of the first conductive line unit on the substrate.