OLED Driving Low-Voltage Lines for High Resolution
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Solution Overview
Problem
Organic light emitting diode (OLED) displays face challenges in achieving high resolution without increasing the size of the openings for connecting driving low-voltage lines and cathode electrodes, which limits pixel space and results in reduced resolution and increased RC delay.
Innovation Solution
The OLED display is designed with first driving low-voltage lines overlapping openings for connection with the cathode electrode at opposite sides of three or more pixel groups, allowing two pixel regions to be driven by one driving voltage line, and second driving low-voltage lines without openings for connection at opposite sides of one pixel group, reducing voltage drop and maintaining constant voltage across pixel regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the opening size for connecting driving low-voltage lines and cathode electrodes is increased, then the connection reliability is improved, but the pixel space is reduced and resolution is degraded
Solution Approach 1:
The pixel electrode is divided into multiple segments corresponding to different pixel regions, with each segment connected to driving low-voltage lines positioned at opposite sides of pixel groups. This segmentation allows the opening to be distributed across multiple locations rather than requiring a single large opening, thereby maintaining connection reliability while preserving pixel space for high resolution
Solution Approach 2:
The driving low-voltage lines are positioned in the horizontal direction (first direction) at opposite sides of pixel groups, rather than only in the vertical direction. This dimensional change in line arrangement allows for more efficient space utilization and reduces the impact on pixel area, enabling high resolution while maintaining reliable electrical connections
2Loss of time
If the gate or data wire width is increased, then the RC delay is reduced and driving margin is improved, but the pixel space is reduced
Solution Approach 1:
Gate and data wires are arranged to extend in the horizontal direction (first direction) through the pixel regions, utilizing the horizontal space between pixel electrodes. This dimensional change in wire routing allows for wider wire formation without increasing the vertical footprint, thereby reducing RC delay while maintaining high pixel density and resolution
3Reliability
If more driving low-voltage lines are added to serve more pixel regions, then the voltage distribution is improved, but the device complexity increases
Solution Approach 1:
Each driving low-voltage line serves multiple pixel regions simultaneously by being positioned to provide voltage to pixel electrodes across several adjacent pixels. This multi-functional design allows a reduced number of driving low-voltage lines to effectively serve the entire display panel, improving voltage distribution while minimizing device complexity
Solution Approach 2:
Adjacent pixel regions are grouped into pixel groups that share common driving low-voltage lines. This merging approach consolidates the voltage supply function, where a single driving low-voltage line provides voltage to multiple pixel electrodes within a pixel group, thereby reducing the total number of required lines while maintaining reliable voltage distribution across all pixel regions
Data Source
AI summary
An organic light emitting diode display includes pixel groups disposed in parallel in a first direction and each including n1 pixel regions; driving voltage lines disposed between two adjacent pixel regions of the n1 pixel regions and extending in a second direction intersecting the first direction to apply a driving voltage to the two adjacent pixel regions; initializing voltage lines extending in the second direction to apply an initializing voltage to the pixel groups; data lines extending in the second direction to apply a data voltage to the pixel groups; first driving low-voltage lines extending in the second direction to apply a driving low voltage to the pixel groups; and a scan line extending in the first direction and intersecting the driving voltage lines, the initializing voltage lines, the data lines and the first driving low-voltage lines, where 3×n2 pixel groups are disposed between two adjacent first driving low-voltage lines.