OLED Driving Voltage Line Mesh Structure for Aperture Ratio

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Solution Overview

Problem

In OLED displays, the disconnection of driving voltage lines due to intersections with gate and data lines leads to signal delays and reduced aperture ratios, and existing solutions increase the occupied area, reducing the effectiveness of the display.

Innovation Solution

The OLED display design includes a first driving voltage line with a transparent conductive material and a metal layer, overlapping the gate and data lines, and a second driving voltage line with a metal layer, both formed with a mesh shape to increase the emission area and prevent disconnection, while being isolated by an organic insulating layer to reduce signal delays.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If driving voltage lines are disposed close to gate lines or data lines, then the occupied area is reduced and aperture ratio is improved, but signal delay occurs in the gate lines or data lines

Engineering Contradiction:
Improveoccupied areaVSAvoidsignal delay
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

An organic insulating layer is introduced as an intermediary substance between the driving voltage lines and the gate/data lines. This insulating layer allows the driving voltage lines to be positioned closer to the signal lines without causing signal delay, as it provides electrical isolation while maintaining spatial proximity for area efficiency.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent utilizes vertical layering (z-dimension) to resolve the horizontal spacing conflict. By stacking the organic insulating layer between conductive layers, the design achieves close horizontal spacing while maintaining vertical electrical isolation, thus reducing occupied area without causing signal delay.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If driving voltage lines are formed with uniform interval from gate line and data line, then signal delay is prevented, but the occupied area is increased and aperture ratio is remarkably reduced

Engineering Contradiction:
Improvesignal delay preventionVSAvoidoccupied area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The organic insulating layer serves as a mediator that enables close spacing of driving voltage lines without causing signal delay. This eliminates the need for uniform large intervals, allowing lines to be positioned closer together while maintaining signal integrity through the insulating barrier.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Area of stationary object

If driving voltage lines intersect gate lines or data lines, then area is optimized, but disconnection occurs at the intersection area

Engineering Contradiction:
Improvearea optimizationVSAvoiddisconnection
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The patent employs a composite multi-layer structure at intersection points, combining conductive layers (silver paste, ITO) with an organic insulating layer. This composite construction allows lines to cross without electrical interference while maintaining continuous conductive paths, preventing disconnection while optimizing area usage.

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The intersection problem is resolved by transitioning from planar routing to three-dimensional layered routing. Conductive lines in different layers can cross without physical contact, eliminating disconnection risks at intersections while maintaining area optimization through compact layout.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS8169138B2Organic light emitting diode display including a driving voltage line and method for manufacturing the same
Publication Date: 2012.05.01 SAMSUNG DISPLAY CO LTD
  • US8169138B2 patent drawing
  • US8169138B2 patent drawing
  • US8169138B2 patent drawing

AI summary

The present invention relates to an OLED display and a manufacturing method thereof, including a gate line, a data line intersecting the gate line, a switching thin film transistor connected to the gate line and the data line, a driving thin film transistor connected to the switching thin film transistor, a first driving voltage line connected to the driving thin film transistor and overlapping the gate line and the data line, a first electrode connected to the driving thin film transistor, a second electrode facing the first electrode, and an light emitting member disposed between the first electrode and the second electrode.