OLED Crack Detect Line ESD Circuit With Charge-Storing Capacitors

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Solution Overview

Problem

In organic light-emitting diode (OLED) display panels, the panel crack detect line is prone to damage from static electricity during production, and existing electrostatic protection circuits are inadequate in preventing static charge accumulation, which can impair crack detection accuracy.

Innovation Solution

An electrostatic protection circuit is designed with a plurality of transistors on a base substrate, forming a control line connected to a panel crack detect line, with capacitors configured to store electrostatic charges and prevent static electricity from affecting the panel crack detect line, featuring a specific capacitor design and via structure to prevent short-circuiting and ensure accurate crack detection.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If an electrostatic protection circuit is provided in the peripheral area to protect the panel crack detect line from static electricity, then the panel crack detect line is protected from static electricity damage, but the existing electrostatic protection circuits are inadequate in preventing static charge accumulation which can impair crack detection accuracy

Engineering Contradiction:
Improveprotection of panel crack detect line from static electricityVSAvoidcrack detection accuracy
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The electrostatic protection circuit is divided into multiple first transistors arranged in two rows, with each transistor having specific capacitor structures. This segmentation allows for better distribution and management of electrostatic charges across different regions, improving both protection capability and detection accuracy by preventing charge accumulation at single points.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Capacitors are introduced as intermediary elements between the panel crack detect line and the rest of the circuit. These capacitors (including first capacitors formed by overlapping active layer and gate, and second capacitors with electrode pairs) act as charge storage devices that prevent static electricity from directly affecting the crack detection line, thereby maintaining detection accuracy while providing protection.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If a first via is provided in the insulation layer to electrically connect the first power supply line and the control line, then electrical connection is achieved, but the first via may be short-circuited by discharge of the first capacitor

Engineering Contradiction:
Improveelectrical connection between power supply line and control lineVSAvoidshort-circuit risk to first via from capacitor discharge
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The first capacitor is positioned at a specific distance from the first via in the planar dimension, with the orthographic projection spacing requirement ensuring spatial separation. This dimensional arrangement prevents the capacitor discharge path from directly affecting the via, eliminating the short-circuit risk while maintaining electrical connection functionality.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The design pre-establishes a safety margin by requiring the orthographic projection of the first capacitor to be spaced apart from the first via by a specific distance. This beforehand cushioning prevents potential short-circuiting before it can occur, protecting the via from harmful discharge effects.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Reliability

If the orthographic projection of the first capacitor near the first via is spaced apart from the first via by a specific distance ratio greater than 0.375, then short-circuiting is prevented, but the layout complexity and design constraints increase

Engineering Contradiction:
Improveprevention of short-circuitingVSAvoidlayout design constraints
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

A specific quantitative parameter (distance ratio greater than 0.375) is established to define the spacing between the first capacitor and first via. This parameter-based approach provides a clear, measurable design criterion that simplifies layout implementation while ensuring reliable short-circuit prevention, transforming a complex spatial constraint into a manageable numerical specification.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution effectively stores and manages electrostatic charges, preventing damage to the panel crack detect line and ensuring reliable crack detection by maintaining the integrity of the capacitance values and preventing short-circuiting, thus enhancing the accuracy and reliability of crack detection in OLED display panels.

Implementation Method 1

the active layer and the gate of the first transistor are arranged in an overlapping manner and insulated and separated from each other to form a first capacitor

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 2

capacitors configured to store electrostatic charges and prevent static electricity from affecting the panel crack detect line

Methodology Applied
Scientific EffectElectrostatic charge storage: Electrostatics

Data Source

PatentUS12003093B2Electrostatic protection circuit, display substrate and display apparatus
Publication Date: 2024.06.04 CHENGDU BOE OPTOELECTRONICS TECH CO LTD
  • US12003093B2 patent drawing
  • US12003093B2 patent drawing
  • US12003093B2 patent drawing

AI summary

Disclosed are an electrostatic protection circuit, a display substrate and a display apparatus. The electrostatic protection circuit includes: a plurality of first transistors (11) on a base substrate, each of which includes a gate, an active layer (112), a first electrode (113), a second electrode (114) and a connection part (115). Gates of the first transistors (11) are connected to each other to form a control line (12). The first electrode (113) of each first transistor (11) is electrically connected to a panel crack detect line (PL), the connection part (115) is connected between the first electrode (113) and the second electrode (114), and the active layer (112) and the gate of each first transistor (11) are arranged in an overlapping manner and insulated and separated from each other to form a first capacitor. The control line (12) is electrically connected to a first power supply line (VSS).