OLED Gate Bridge Via Hole Active Pattern Protection

The patent transitions from planar contact hole connections to three-dimensional via hole connections that pass through multiple layers. The via holes penetrate the insulating layer and gate electrode layer to establish vertical electrical connections, eliminating the need for surface-level contact holes that damage active patterns. This dimensional change enables reliable electrical connection without compromising active pattern integrity.

The patent introduces via holes as intermediary structures that facilitate electrical connection between data lines and active patterns without direct contact hole formation on the active patterns themselves. The via holes act as mediators by providing alternative connection pathways through the gate electrode layer, thus protecting the active patterns from damage while maintaining electrical connectivity.

The patent resolves crosstalk by separating data lines and gate electrodes into different vertical layers. Data lines are positioned in the insulating layer while gate electrodes occupy the gate electrode layer below. This vertical stratification eliminates electromagnetic interference between adjacent conductors, enabling clean signal transmission while maintaining manufacturing efficiency through systematic layering.

The patent segments the conductive elements into distinct functional layers: data lines in the insulating layer and gate electrodes in the gate electrode layer. This segmentation physically separates potentially interfering signals, allowing both data transmission and gate control to occur simultaneously without crosstalk, while the layered structure remains manufacturable through standard semiconductor fabrication processes.