OLED Display Substrate Gate Drive Circuit Layout Optimization
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Solution Overview
Problem
Existing display technologies, particularly OLEDs, face challenges in efficiently driving sub-pixels due to high load on clock signal lines, which affects performance and leads to a wider bezel.
Innovation Solution
A display substrate with a gate drive circuit featuring cascaded shift register units, including an input sub-circuit and a denoising output sub-circuit, is designed. This configuration improves layout density and reduces load on clock signal lines, enabling better performance and a narrower bezel.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional gate drive circuit is used to drive sub-pixels, then the display function is achieved, but the load on clock signal lines is high which affects performance and results in a wider bezel
Solution Approach 1:
The gate drive circuit is divided into multiple cascaded shift register units, each responsible for driving specific sub-pixels. This segmentation distributes the driving load across multiple independent units rather than concentrating it on a single circuit, reducing the overall load on clock signal lines while maintaining display functionality
Solution Approach 2:
The patent introduces a new spatial arrangement by placing shift register units in a cascaded configuration along a scanning direction. This dimensional organization allows the circuit to progress through stages, with each stage handling a portion of the total load, thereby reducing peak load on any single clock signal line
2Productivity
If the layout density of shift register units is low, then the circuit design is simpler, but the bezel width increases and performance decreases
Solution Approach 1:
Multiple shift register units are merged into a cascaded configuration where the output of one unit connects to the input of the next. This merging allows compact arrangement of the circuit elements, increasing layout density while the modular cascaded structure keeps the overall design manageable and not overly complex
Solution Approach 2:
Each shift register unit in the cascaded configuration serves multiple functions: it acts as both an output stage for its segment and an input stage for the next segment. This multi-functionality allows the same basic circuit structure to be reused across multiple units, increasing layout density without proportionally increasing design complexity
Data Source
AI summary
Provided is a display substrate including a display region and a non-display region. The non-display region is provided with a gate drive circuit, and the gate drive circuit includes a plurality of cascaded shift register units; a shift register unit includes an input sub-circuit and a denoising output sub-circuit. The denoising output sub-circuit is connected with the input sub-circuit, a first group of clock signal lines, and a second group of clock signal lines, and the input sub-circuit is connected with a third group of clock signal lines. The third group of clock signal lines, the input sub-circuit, the first group of clock signal lines, the denoising output sub-circuit, and the second group of clock signal lines are sequentially arranged along a first direction.