OLED Gate Driver Integration for Narrow-Bezel High-Resolution Displays

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing gate drivers in OLED devices require a large area due to the increase in the number of stages needed for high-resolution displays, making it difficult to achieve a narrow bezel.

Innovation Solution

Integration of a light emission control signal generator and an initialization voltage generator within the gate driver, utilizing a cascade connection of scan and sensing transistors to reduce the size of the gate driver.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the number of stages in the gate driver is increased to support high-resolution displays, then the display resolution is improved, but the area of the gate driver increases

Engineering Contradiction:
Improvedisplay resolutionVSAvoidgate driver area
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The patent combines the light emission control signal generator and initialization voltage generator into a single integrated circuit within the gate driver. This merging of multiple functional blocks reduces the overall gate driver area while maintaining the capability to support high-resolution displays through multiple stages.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The gate driver is designed to perform multiple functions including scan signal generation, light emission control, and initialization voltage supply within a single integrated structure. This multi-functionality allows the gate driver to support high-resolution displays without requiring separate dedicated circuits for each function, thereby reducing total area.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Length of stationary object

If the gate driver area is reduced to achieve a narrow bezel, then the bezel width is improved, but the number of stages that can be accommodated is limited

Engineering Contradiction:
Improvebezel widthVSAvoidnumber of scan signals
Core Design Contradiction:
Length of stationary objectVSProductivity

Solution Approach 1:

The patent optimizes the spatial arrangement of circuit elements within the gate driver, utilizing vertical stacking and layered routing to accommodate more stages in a compact horizontal footprint. This dimensional optimization allows increased number of scan signals while maintaining narrow bezel width.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

By integrating multiple functional generators (light emission control and initialization) into the gate driver, the patent reduces the external area required while internally accommodating multiple stages through efficient space utilization, thereby supporting increased productivity without increasing bezel width.

Inventive Principle:
Principle #5Merging (Combining)

3Reliability

If separate circuits are used for light emission control and initialization voltage generation, then the functional reliability is improved, but the device complexity increases

Engineering Contradiction:
Improvefunctional reliabilityVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent integrates the light emission control signal generator and initialization voltage generator into a single unified circuit block within the gate driver. This merging maintains functional reliability by preserving distinct operational pathways while reducing overall device complexity through shared infrastructure and reduced interconnections.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS12567374B2Gate driver and organic light emitting display device including the same
Publication Date: 2026.03.03 LG DISPLAY CO LTD
  • US12567374B2 patent drawing
  • US12567374B2 patent drawing
  • US12567374B2 patent drawing

AI summary

A gate driver includes a first scan signal generator configured to output a logic voltage for driving of a scan transistor through a plurality of stages connected in cascade, the scan transistor performing a switching operation to transfer a data voltage to a driving transistor of a pixel, a second scan signal generator configured to output a logic voltage for driving of a sensing transistor through the plurality of stages, the sensing transistor sensing deterioration of a light emitting element of the pixel, a light emission control signal generator configured to output a logic voltage for control of a light emission control transistor of the pixel through the plurality of stages, and an initialization voltage generator driven by logic voltages received from some nodes of the first scan signal generator based on the light emission control signal generator to supply an initialization voltage to the pixel.