OLED Gate Shift Register for Random-Order Sensing Pulses
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Solution Overview
Problem
Existing gate shift registers for OLED displays face complexity and increased power consumption when generating sensing gate pulses in random order to reduce line dim perception, leading to luminance variations and increased bezel size due to complex configurations and additional clock and power lines.
Innovation Solution
A gate shift register with a simplified circuit configuration that outputs sensing gate pulses in random order during the vertical blanking interval, utilizing a first and second stage with shared partial circuits to selectively activate and deactivate nodes based on voltage and global reset signals, allowing for irregular selection of sensing target pixel lines without sequential output.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If sensing gate pulses are output in random order to reduce line dim perception, then line dim perception is reduced, but gate shift register configuration becomes complicated and power consumption increases
Solution Approach 1:
The patent merges the sensing gate pulse generation function into the existing gate shift register stages that generate image display gate pulses. The same shift register stages (first stage with node Q1, second stage with node Q2) are used to generate both image display gate pulses during the image data writing period and sensing gate pulses during the vertical blanking interval. This eliminates the need for separate sensing gate pulse generation circuits, thereby reducing device complexity while maintaining random order output capability through selective activation of stages.
2Object-affected harmful factors
If sensing gate pulses are output in random order to reduce line dim perception, then line dim perception is reduced, but power consumption increases due to additional clock lines and power lines
Solution Approach 1:
The patent makes the gate shift register stages multi-functional by enabling them to generate both image display gate pulses and sensing gate pulses using the same clock signals and power lines. The first stage and second stage share the same operational framework, allowing a single set of clock lines and power lines to serve dual purposes: driving image display during the writing period and enabling random-order sensing during the vertical blanking interval. This eliminates the need for additional dedicated clock and power lines for sensing operations, thereby reducing power consumption.
3Object-affected harmful factors
If complicated gate shift register configuration is used to output sensing gate pulses in random order, then line dim perception is reduced, but bezel size increases
Solution Approach 1:
The patent merges the sensing gate pulse generation function into the existing gate shift register stages that generate image display gate pulses. The same shift register stages (first stage with node Q1, second stage with node Q2) are used to generate both image display gate pulses during the image data writing period and sensing gate pulses during the vertical blanking interval. This eliminates the need for separate sensing gate pulse generation circuits, thereby reducing device complexity while maintaining random order output capability through selective activation of stages.
Data Source
AI summary
A gate shift register and an organic light emitting diode display including the same are disclosed. The gate shift register includes a first stage and a second stage that output image display gate pulses during an image data writing period and selectively output a sensing gate pulse in a vertical blanking interval in which image display data is not written. The first stage includes a node Q1, a node Qbo, a node M, a first sensing control block activating the node Q1, and a second sensing control block deactivating the node Qbo. The second stage includes a node Q2, a node Qbe, a third sensing control block activating the node Q2, and a fourth sensing control block deactivating the node Qbe. The first stage and the second stage share a partial circuit necessary for driving with each other.


