OLED Display Gate Driving With Stage Transistor Synchronization
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Solution Overview
Problem
In OLED display devices, the complexity of gate driving units due to multiple gate signals leads to time delays, causing luminance deviations between odd and even pixel lines, and resulting in display quality issues like vertical triangle crosstalk.
Innovation Solution
A display device is designed to minimize luminance deviation by generating a new gate signal using a stage transistor and supplying it to either the odd or even pixel lines, thereby synchronizing the gate signals and reducing time delays.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple gate signals are used to drive OLED display device, then the display device can be driven, but the gate driving unit becomes complicated and time delay is generated causing luminance deviation
Solution Approach 1:
A new gate1 signal is introduced as an intermediary signal between the original gate1 signal and the pixel lines. This new gate1 signal is generated by buffering the original gate1 signal through a stage transistor, thereby mediating the timing synchronization between odd and even pixel lines without adding complexity to the overall gate driving architecture
Solution Approach 2:
The gate driving unit is segmented into separate blocks for generating gate1 signal, gate2 signal, and emission signal. The stage transistor is specifically placed in the gate1 signal block to buffer and synchronize signals, allowing independent optimization of each signal path while maintaining overall system functionality
2Productivity
If multiple gate signals are used to drive OLED display device, then the display device can be driven, but time delay causes luminance deviation between pixel lines
Solution Approach 1:
The stage transistor buffers the gate1 signal in advance before it is applied to the pixel lines. This preliminary buffering action ensures that the gate1 signal is synchronized and ready to be applied simultaneously to both odd and even pixel lines, preventing timing delays that would cause luminance deviations
Solution Approach 2:
The new gate1 signal acts as a mediator that synchronizes the timing between different pixel line groups. By introducing this intermediate buffered signal, the system achieves uniform luminance across all pixel lines while maintaining the ability to drive the display at high speeds
3Manufacturing precision
If stage transistor is used to generate new gate signal, then luminance deviation is minimized, but device complexity increases
Solution Approach 1:
The stage transistor is placed locally only in the gate1 signal block where timing synchronization is needed, rather than throughout the entire gate driving unit. This localized approach improves luminance uniformity where necessary while minimizing the increase in overall device complexity
Solution Approach 2:
The new gate1 signal serves as a localized intermediary that resolves timing issues only in the specific area where they occur (gate1 signal path), allowing the rest of the gate driving unit to remain simple and unchanged
Data Source
AI summary
A display device is provided. The display device includes: a timing controlling unit generating an image data, a data control signal and a gate control signal; a data driving unit generating a data signal using the image data and the data control signal; a gate driving unit generating a gate1 signal, a new gate1 signal, an odd gate2 signal, an even gate2 signal and an emission signal using the gate control signal and including a plurality of stages; and a display panel displaying an image using the gate1 signal, the new gate1 signal, the odd gate2 signal, the even gate2 signal and the emission signal, wherein each of the plurality of stages includes: a gate1 signal block; an odd gate2 signal block; an even gate2 signal block; first and second stage transistors; and an emission signal block generating the emission signal. Accordingly, since the new gate signal is generated by using the stage transistor, the luminance deviation between the odd and even pixel lines is minimized.