OLED Emission Layer Capacitor Stacking for Stable Driving Gate Voltage
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Solution Overview
Problem
Display devices, particularly organic light emitting diode (OLED) displays, face issues with maintaining stable voltage at the driving gate electrode, leading to defects such as color deviation and crosstalk between pixels due to insufficient capacitance.
Innovation Solution
The design incorporates a capacitor structure with overlapping conductors to enhance capacitance, including a first and second sub-capacitor configuration, where the driving gate electrode and expansion of the storage line form one sub-capacitor, and the connector and driving voltage line form another, ensuring stable voltage maintenance across the driving gate electrode.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional capacitor structure is used, then the device complexity is low, but the voltage stability at the driving gate electrode is insufficient, leading to color deviation and crosstalk
Solution Approach 1:
The patent merges two sub-capacitors (first sub-capacitor with the driving gate electrode and second sub-capacitor with the connector) into a single capacitor structure. This combined structure provides sufficient total capacitance to maintain voltage stability at the driving gate electrode, preventing color deviation and crosstalk, while avoiding the need for completely separate capacitor implementations.
Solution Approach 2:
The patent utilizes vertical stacking in the cross-sectional direction to arrange multiple conductive layers (driving gate electrode, connector, storage line expansion, driving voltage line) at different heights. This three-dimensional arrangement increases the effective capacitance area without proportionally increasing the planar footprint, thereby improving voltage stability while controlling device complexity.
2Reliability
If the capacitance is increased to maintain voltage stability, then color deviation and crosstalk are reduced, but the area occupied by the capacitor structure increases
Solution Approach 1:
The patent transitions from a two-dimensional planar capacitor layout to a three-dimensional stacked structure. By arranging conductive layers vertically at different heights (driving gate electrode at one level, connector and storage line expansion at another, driving voltage line at a third level), the effective capacitance area is increased without proportionally increasing the planar area occupied on the substrate.
Solution Approach 2:
The patent nests multiple conductive elements within each other's vertical projection areas. The storage line expansion is positioned to overlap with the connector, and the driving voltage line overlaps with both the connector and storage line expansion. This nested arrangement maximizes the use of available space, allowing sufficient capacitance to be achieved within a compact area.
Data Source
AI summary
A display device includes a substrate and an active pattern positioned above the substrate and including a plurality of channel regions and a plurality of conductive regions. The display device includes a plurality of scan lines extending substantially in a first direction. The display device includes a data line and a driving voltage line crossing the plurality of scan lines. The display device includes a first transistor including a first channel region among the plurality of channel regions and a first gate electrode. The display device includes a first connector electrically connecting the first gate electrode of the first transistor and a first conductive region among the plurality of conductive regions to each other. The driving voltage line overlaps at least a portion of the first connector along a direction orthogonal to an upper surface of the substrate.