OLED Display Panel GIP Circuit Active Area Integration
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Solution Overview
Problem
Conventional OLED display panels face challenges in designing a narrow bezel due to the integration of the gate driving circuit in the non-active area, which limits the minimization of bezel size and complicates the application of GIP signals.
Innovation Solution
The GIP driving circuit is arranged in the active area, and GIP signals are applied using a single-sided COF, distributing stages of the GIP driving circuit across unit pixel regions to supply scan pulses, with signal lines formed in the LOG part outside the PAD to facilitate signal delivery to the GIP parts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If the GIP driving circuit is arranged in the non-active area, then the circuit integration is simplified, but the bezel size cannot be minimized
Solution Approach 1:
The GIP driving circuit is segmented into multiple stages, with each stage distributed in different unit pixel regions within the active area. This segmentation allows the circuit functionality to be maintained while redistributing components to achieve narrower bezels.
Solution Approach 2:
The GIP driving circuit is transitioned from being arranged in the non-active area (peripheral dimension) to being distributed within the active area (internal dimension). This dimensional repositioning enables the circuit to coexist with the display area, minimizing bezel size while maintaining integration.
2Ease of manufacture
If signal lines are formed inside the pad part, then signal application is straightforward, but signal overlap with other lines occurs
Solution Approach 1:
The signal lines for the GIP driving circuit are extracted from the pad part area and formed outside it. This separation eliminates the signal overlap problem that would occur if lines were routed through the congested pad region, while still enabling efficient signal application to the distributed circuit stages.
Data Source
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AI summary
The present invention relates to an OLED display panel (PNL) and an OLED display device in which a gate-in-panel (GIP) driving circuit is arranged in an active area (AA) in order to minimize a bezel size and a GIP signal is applied to the GIP driving circuit arranged in the active area (AA) using a single-sided COF, and the OLED display panel includes: an active area (AA) including data lines, scan lines intersecting the data lines, and sub-pixels arranged at each intersection; stages of a GIP driving circuit distributed and arranged in a plurality of unit pixel regions corresponding to the scan lines in the active area (AA) to supply scan pulses to the scan lines; and a non-active area (NA) including a pad part (PAD), a link part (Link) and a line-on-glass (LOG) part (LOG), wherein the pad part (PAD) includes a gate pad part (G_Pad) for supplying various control signals to the stages of the GIP driving circuit, and a data pad part (D_Pad) for supplying a data voltage to each data line, and wherein the non-active area (NA) includes a plurality of signal lines extended from the gate pad part (G_Pad) via the link part (Link) to the LOG part in order to supply various control signals to the GIP parts (31) is arranged.