OLED Timing Controller Input Controller Memory Collision Prevention

The patent combines the dual port memory function with a conventional single port memory by integrating a controller that manages data input and output operations. The controller enables the single port memory to perform dual port operations by coordinating write and read operations, thereby achieving the required data storage and output capability without using dedicated dual port memory components, thus reducing mounting area and cost.

The patent makes a conventional single port memory perform multiple functions by adding a controller that enables it to handle both data input and output operations simultaneously. The memory system is designed to accept write commands and read commands through the same port at different time slots, making the single port memory universal enough to replace specialized dual port memory while reducing area and cost.

The patent extracts the collision prevention function from the complex phase locked loop circuit and implements it within the memory controller using simpler logic circuits. The controller includes collision detection logic that monitors write and read operations and prevents collisions through straightforward control signals, eliminating the need for elaborate PLL circuits while maintaining reliable collision prevention.

The patent replaces expensive and complex phase locked loop circuits with inexpensive, simple control logic within the memory controller. The collision prevention is achieved through basic timing control and status flag mechanisms that are much cheaper and simpler to implement than PLL circuits, while still effectively preventing memory collisions.

The patent implements feedback mechanisms within the memory controller that monitor the state of the memory system and dynamically adjust control signals to prevent collisions. The controller uses status flags and timing signals to detect potential collision conditions and adjusts the timing of read and write operations accordingly, providing real-time feedback control that prevents collisions while using conventional memory.

The patent performs preliminary collision detection and prevention actions within the controller before actual memory operations occur. The controller pre-coordinates read and write operations by analyzing timing requirements and generating control signals that prevent collision conditions from arising in the first place, rather than reacting to collisions after they occur.