OLED Display Insulating Layer Layout for Low Crosstalk Wiring
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Solution Overview
Problem
As organic light emitting diode displays are manufactured with higher resolution and larger areas, the increased number of thin film transistors and wirings leads to challenges in minimizing parasitic capacitance and crosstalk between adjacent components, affecting image quality and signal integrity.
Innovation Solution
The use of a substrate with alternating inorganic and organic interlayer insulating layers, specifically with the second interlayer insulating layer having a lower dielectric constant than the first, helps in reducing parasitic capacitance and crosstalk by increasing the distance between the capacitor electrode and the data wire, and suppressing short-circuits, while maintaining precise control over gate voltage for improved image quality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If the number of thin film transistors and wirings is increased to achieve high resolution and large area, then the display resolution and area are improved, but parasitic capacitance and crosstalk between adjacent components increase
Solution Approach 1:
The patent applies different dielectric materials with different properties to different locations between the data wire and gate electrode. Specifically, a first dielectric material is used in a first region and a second dielectric material with lower dielectric constant is used in a second region directly between the data wire and gate electrode. This local differentiation reduces parasitic capacitance at the critical interface while maintaining other functional requirements.
Solution Approach 2:
The patent changes the dielectric constant parameter of the insulating layer by selecting materials with different dielectric constants for different regions. The second dielectric material is specifically chosen to have a lower dielectric constant than the first dielectric material, which directly reduces the parasitic capacitance formed between the data wire and gate electrode.
2Measurement precision
If the number of thin film transistors and wirings is increased to achieve high resolution and large area, then the display resolution and area are improved, but crosstalk between adjacent components increases
Solution Approach 1:
The patent applies different dielectric materials with different properties to different locations between the data wire and gate electrode. Specifically, a first dielectric material is used in a first region and a second dielectric material with lower dielectric constant is used in a second region directly between the data wire and gate electrode. This local differentiation reduces parasitic capacitance at the critical interface while maintaining other functional requirements.
Solution Approach 2:
The patent changes the dielectric constant parameter of the insulating layer by selecting materials with different dielectric constants for different regions. The second dielectric material is specifically chosen to have a lower dielectric constant than the first dielectric material, which directly reduces the parasitic capacitance formed between the data wire and gate electrode.
3Object-generated harmful factors
If the distance between capacitor electrode and data wire is increased to reduce parasitic capacitance, then parasitic capacitance is reduced, but device area increases
Solution Approach 1:
The patent applies different dielectric materials with different properties to different locations between the data wire and gate electrode. Specifically, a first dielectric material is used in a first region and a second dielectric material with lower dielectric constant is used in a second region directly between the data wire and gate electrode. This local differentiation reduces parasitic capacitance at the critical interface while maintaining other functional requirements.
Solution Approach 2:
The patent uses a composite dielectric structure consisting of two different dielectric materials stacked or arranged in specific regions. The first dielectric material and second dielectric material form a composite insulating layer that provides both electrical insulation and reduced parasitic capacitance, allowing compact device layout.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration minimizes crosstalk and parasitic capacitance, ensuring accurate signal transmission and enhancing the overall image quality of the organic light emitting diode display, even with a higher density of wirings.
Implementation Method 1
the second interlayer insulating layer having a lower dielectric constant than the first
Data Source
AI summary
Disclosed herein is an organic light emitting diode display, including a substrate, a first thin film transistor including a first active pattern on the substrate and a first gate electrode on the first active pattern, a data wire on the first gate electrode, a first interlayer insulating layer between the first gate electrode and the data wire, a second interlayer insulating layer positioned the first interlayer insulating layer and the data wire, and an organic light emitting diode positioned on the data wire and connected to the first active pattern.