OLED Compensation Transistor Insulation Layout for Kick-Back Reduction

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Solution Overview

Problem

Existing organic light-emitting display apparatuses face issues with image quality due to kick-back voltage caused by compensation transistors, leading to afterimages and uneven driving current distribution across pixels.

Innovation Solution

The apparatus incorporates a gate insulating layer with a single-layer structure between the first compensation gate electrode and active region, and a multi-layer structure between the second compensation gate electrode and active region, using silicon oxide and silicon nitride materials with varying dielectric constants to reduce parasitic capacitance and enhance sensitivity, while maintaining equal thickness in both compensation portions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If a compensation transistor is used to compensate for threshold voltage variations, then image quality is improved, but kick-back voltage occurs causing afterimages

Engineering Contradiction:
Improveimage qualityVSAvoidkick-back voltage
Core Design Contradiction:
Measurement precisionVSObject-generated harmful factors

Solution Approach 1:

The gate insulating layer is designed with different structures in different regions: a first gate insulating layer in the compensation transistor region and a second gate insulating layer in the driving transistor region. This local differentiation allows the compensation transistor to achieve effective threshold voltage compensation while the driving transistor region maintains stability and reduces kick-back voltage effects.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent employs a composite gate insulating layer structure consisting of multiple insulating materials with different dielectric properties. The first gate insulating layer and second gate insulating layer are formed with different material compositions and thicknesses, creating a composite structure that optimizes both compensation performance and kick-back voltage suppression.

Inventive Principle:
Principle #40Composite materials

2Ease of manufacture

If a uniform gate insulating layer structure is used, then manufacturing is simplified, but sensitivity of compensation and driving transistors is insufficient

Engineering Contradiction:
Improvegate insulating layer fabricationVSAvoidtransistor sensitivity
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

Different gate insulating layer structures are implemented for different transistor types: the compensation transistor receives a first gate insulating layer with specific properties, while the driving transistor receives a second gate insulating layer with different properties. This local optimization enhances the sensitivity and performance of each transistor type without requiring complete restructuring of the manufacturing process.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent varies key parameters of the gate insulating layer including material composition, layer thickness, and dielectric constant across different regions. By adjusting these parameters locally, the sensitivity of compensation and driving transistors is optimized while maintaining compatibility with existing manufacturing capabilities.

Inventive Principle:
Principle #35Parameter changes

3Object-affected harmful factors

If the gate insulating layer thickness is increased, then parasitic capacitance is reduced, but transistor sensitivity decreases

Engineering Contradiction:
Improveparasitic capacitanceVSAvoidtransistor sensitivity
Core Design Contradiction:
Object-affected harmful factorsVSReliability

Solution Approach 1:

The gate insulating layer is constructed as a composite structure with multiple layers having different dielectric constants and thicknesses. This composite approach reduces parasitic capacitance through optimized layer configuration while maintaining adequate transistor sensitivity by ensuring sufficient total insulating capability and appropriate electric field distribution.

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

Different gate insulating layer configurations are applied to different transistor regions based on their specific requirements. The compensation transistor region and driving transistor region have tailored gate insulating layer structures that optimize the balance between parasitic capacitance reduction and sensitivity maintenance for each respective transistor type.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration improves image quality by reducing kick-back phenomena and ensuring consistent driving current across pixels, thereby enhancing display performance and sensitivity of the compensation and driving transistors.

Implementation Method 1

using silicon oxide and silicon nitride materials with varying dielectric constants to reduce parasitic capacitance and enhance sensitivity

Methodology Applied
Scientific EffectParasitic capacitance: Parasitic Capacitance

Data Source

PatentUS11974474B2Organic light-emitting display apparatus and method of manufacturing the same
Publication Date: 2024.04.30 SAMSUNG DISPLAY CO LTD
  • US11974474B2 patent drawing
  • US11974474B2 patent drawing
  • US11974474B2 patent drawing

AI summary

An organic light-emitting display apparatus includes an organic light-emitting diode, a driving transistor configured to control an amount of electric current flowing to the organic light-emitting diode from a power line, a compensation transistor configured to diode-connect the driving transistor in response to a voltage applied to first and second compensation gate electrodes of the compensation transistor, and a gate insulating layer between the compensation gate electrodes and a compensation active region of a compensation transistor. A layer structure of the gate insulating layer between the first compensation gate electrode and the compensation active region is different from a layer structure of the gate insulating layer between the second compensation gate electrode and the compensation active region.