OLED Array Substrate Interference Preventing Block

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Solution Overview

Problem

Current OLED display technologies face challenges in maintaining display quality due to cross-talk between signal nodes and adjacent data lines, which affects the efficiency of light emission and overall image display, particularly in organic light emitting diode (OLED) displays.

Innovation Solution

The introduction of an array substrate with a pixel driving circuit that includes a driving transistor, storage capacitor, and specific initialization connecting lines, along with an interference preventing block, which reduces cross-talk by optimizing the layout and connections of signal lines and voltage supply lines, thereby enhancing light transmittance and preventing color shift.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If signal lines are closely routed to data lines for compact layout, then device area is reduced, but cross-talk between signal nodes and data lines increases

Engineering Contradiction:
Improvedisplay areaVSAvoidcross-talk
Core Design Contradiction:
Area of stationary objectVSObject-affected harmful factors

Solution Approach 1:

The patent introduces an interference preventing block positioned between the signal line and data line to act as an intermediary structure. This block reduces parasitic capacitance and cross-talk by physically separating the electromagnetic fields of adjacent conductors, allowing compact routing while maintaining signal integrity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The interference preventing block is strategically placed only in regions where cross-talk is most severe, such as beneath or adjacent to critical signal nodes. This localized approach reduces cross-talk where needed without requiring complete redesign of the entire signal line routing, thus maintaining compact overall layout.

Inventive Principle:
Principle #3Local quality

2Reliability

If more signal lines are added to improve display quality, then display performance is enhanced, but parasitic capacitance and cross-talk increase

Engineering Contradiction:
Improvedisplay qualityVSAvoidparasitic capacitance
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The interference preventing block serves as a mediator that reduces parasitic capacitance between adjacent signal lines and between signal lines and data lines. This allows additional signal lines to be added for improved display quality without proportionally increasing cross-talk, as each new line can be similarly protected.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If anode is positioned to cover signal lines for electrical connection, then connectivity is improved, but light transmittance is reduced

Engineering Contradiction:
Improveelectrical connectivityVSAvoidlight transmittance
Core Design Contradiction:
ReliabilityVSIllumination intensity

Solution Approach 1:

The patent transitions the signal line from a planar configuration to a three-dimensional structure by positioning it beneath the anode in a lower layer. This vertical stacking allows the anode to maintain electrical connection with the signal line through via holes while minimizing the signal line's projection area on the light emission surface, thus preserving light transmittance.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS12022709B2Array substrate and display apparatus
Publication Date: 2024.06.25 CHENGDU BOE OPTOELECTRONICS TECH CO LTD
  • US12022709B2 patent drawing
  • US12022709B2 patent drawing
  • US12022709B2 patent drawing

AI summary

An array substrate is provided. The array substrate includes a respective first anode electrically connected to a respective first light emitting element in a respective first subpixel; a respective second anode electrically connected to a respective second light emitting element in a respective second subpixel; a respective third anode electrically connected to a respective third light emitting element in a respective third subpixel; and a respective fourth anode electrically connected to a respective fourth light emitting element in a respective fourth subpixel. An orthographic projection of the respective third anode on a base substrate substantially covers an orthographic projection of the first initialization connecting line on the base substrate, and covers an orthographic projection of at least portion of the respective third voltage supply line on the base substrate.