OLED Display Mask Reduction via Layer Merging
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Solution Overview
Problem
The high manufacturing cost of organic light emitting display devices due to the need for multiple masks in the production process, which increases the cost and complexity of forming transistors and capacitors in each pixel.
Innovation Solution
A modified pixel structure and manufacturing method that reduces the number of masks required by forming the second storage capacitor plate in the same layer as the driving voltage line and data line, and using a dry etching process to create contact holes without an additional mask, thereby simplifying the process and reducing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple masks are used to form transistors and capacitors in each pixel, then the device functionality is achieved, but the manufacturing cost increases
Solution Approach 1:
The patent combines the formation of the second capacitor plate with the formation of the data line and driving voltage line by depositing them in the same layer. This merging of functions reduces the number of separate mask steps required, thereby lowering manufacturing cost while maintaining the necessary device functionality
Solution Approach 2:
The same deposited layer serves multiple functions: it forms both the second capacitor plate and the data line/driving voltage line. This multi-functionality approach eliminates the need for separate mask steps for each structure, reducing manufacturing complexity and cost
2Manufacturing precision
If multiple masks are used in the production process, then precise patterning is achieved, but the number of process steps increases
Solution Approach 1:
The patent merges the patterning steps for the second capacitor plate and the data line/driving voltage line into a single mask step. By forming both structures from the same deposited layer, the number of process steps is reduced while maintaining the required patterning precision for each structure
3Reliability
If conventional multi-mask process is used, then complete device formation is achieved, but the manufacturing efficiency decreases
Solution Approach 1:
The patent combines multiple device formation functions into fewer process steps by forming the second capacitor plate simultaneously with the data line and driving voltage line. This reduces the total number of mask and deposition cycles required, thereby improving manufacturing efficiency while ensuring complete device formation
Solution Approach 2:
The patent performs the deposition of the second capacitor plate material in advance as part of the data line formation process, before separate patterning steps are needed. This preliminary action consolidates process steps and improves manufacturing throughput
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach lowers the manufacturing cost and simplifies the production process by reducing the number of masks needed, enhancing the efficiency and cost-effectiveness of organic light emitting display device manufacturing.
Implementation Method 1
using a dry etching process to create contact holes without an additional mask
Data Source
AI summary
An organic light emitting display device according to the present disclosure includes: a semiconductor on a substrate including a switching channel of a switching transistor and a driving channel of a driving transistor, the driving transistor being spaced from the switching transistor; a first insulating layer covering the semiconductor; a switching gate electrode on the first insulating layer and overlapping the switching channel and a driving gate electrode on the first gate insulating layer and overlapping the driving channel; a second insulating layer covering the switching gate electrode and the driving gate electrode; a data line on the second insulating layer comprising: an upper data line; and a lower data line; a driving voltage line on the second insulating layer; a passivation layer covering the data line and the driving voltage line; a pixel electrode on the passivation layer; and a first pixel connecting member on the passivation layer.