OLED Panel Parasitic Capacitance Adjustment for Color Deviation

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Solution Overview

Problem

Organic light-emitting display panels face color deviation due to current deviations across the panel plane, particularly in the edge regions, where the efficiency of green light emission is higher than red and blue, leading to luminance changes for small current variations.

Innovation Solution

The design includes a first display region with sub-pixels having a smaller overlap area between the gate electrode of the driving transistor and the anode electrode of the light-emitter, compared to a second display region, to adjust parasitic capacitance and maintain consistent luminance ratios, thereby reducing color deviation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If the overlap area between the gate electrode and anode electrode is kept uniform across the panel, then the manufacturing process is simple, but color deviation occurs due to current deviation in different regions

Engineering Contradiction:
Improveuniform overlap areaVSAvoidcolor consistency
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent applies local quality by making the overlap area between the gate electrode and anode electrode position-dependent. Specifically, the overlap area in the edge region (first display region) is designed to be different from that in the central region (second display region). This local differentiation compensates for current deviation caused by the extraction effect at panel edges, ensuring uniform luminance characteristics across the entire panel while maintaining a relatively simple manufacturing process.

Inventive Principle:
Principle #3Local quality

2Reliability

If the overlap area is increased in the edge region, then the parasitic capacitance increases to compensate for current loss, but the device complexity increases

Engineering Contradiction:
Improvecurrent compensationVSAvoidvariable overlap area design
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies parameter changes by modifying the geometric parameter (overlap area) of the electrode structure based on position. The overlap area is increased in the edge region compared to the central region to compensate for current loss. This approach changes a physical parameter of the existing structure rather than introducing new components or complex control mechanisms, thereby achieving current compensation with minimal increase in device complexity.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces color deviation by adjusting the parasitic capacitance, ensuring consistent driving current and luminance across the panel, minimizing the impact of current deviations and maintaining desired image quality.

Implementation Method 1

a storage capacitor to store a voltage difference between the driving voltage and a voltage of a gate electrode of the driving transistor

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 2

a light-emitter connected to the output node to emit light based on the driving current transferred through the output node

Methodology Applied
Scientific EffectElectroluminescence: Electroluminescence

Implementation Method 3

an overlap area of the gate electrode of the driving transistor and an anode electrode of the light-emitter

Methodology Applied
Scientific EffectParasitic capacitance: Parasitic Capacitance

Data Source

PatentUS9755002B2Organic light-emitting display panel and method of manufacturing the same
Publication Date: 2017.09.05 SAMSUNG DISPLAY CO LTD
  • US9755002B2 patent drawing
  • US9755002B2 patent drawing
  • US9755002B2 patent drawing

AI summary

An organic light-emitting display panel includes a first display region including a plurality of first sub-pixels and a second display region including a plurality of second sub-pixels. Each of the sub-pixels includes a pixel circuit having a driving transistor to output driving current to an output node based on a data signal, a storage capacitor to store a voltage difference between the driving voltage and the gate voltage of the driving transistor, a switching transistor to transfer the data signal to the driving transistor, and a light-emitter connected to emit light based on the driving current. An overlap area of the gate electrode of the driving transistor and an anode electrode of the light-emitter in the first sub-pixel is smaller than an overlap area of the gate electrode of the driving transistor and an anode electrode of the light-emitter in the second sub-pixel.