OLED Panel Layout for Larger Emission Area and Capacitor Capacity
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Solution Overview
Problem
Existing organic light emitting display devices face challenges in achieving high luminance and resolution while maintaining a sufficient light emitting area, as the space arrangement and connection structure between elements limit the size of the storage capacitor and light emitting area.
Innovation Solution
The proposed solution involves an organic light emitting display panel structure where the active layer and second conductive layer contact in an area corresponding to a second node of a driving transistor, allowing for a reduced non-light emitting area without reducing the storage capacitor's area, thereby increasing the light emitting area and storage capacitor capacity, and enabling easy driving of sub-pixels with an active pattern and conductive pattern.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the storage capacitor area is increased to improve luminance characteristics, then the light emitting area is reduced
Solution Approach 1:
The patent utilizes the third dimension (vertical stacking) by forming the storage capacitor beneath the active layer and driving transistor, rather than in the planar space. This allows the capacitor to occupy space in the depth dimension, freeing up the light emitting area on the surface while maintaining sufficient capacitor area for high luminance performance.
Solution Approach 2:
The storage capacitor is nested within the structure by positioning it underneath the active layer and transistor components. The capacitor occupies the space below the light-emitting elements, creating a vertically integrated structure where multiple functional layers are stacked, thereby maximizing space utilization without compromising the light emitting area.
2Area of moving object
If the non-light emitting area is reduced to increase light emitting area, then the storage capacitor area is reduced
Solution Approach 1:
The patent moves the storage capacitor from the lateral (2D) plane to the vertical (3D) dimension by positioning it beneath the active layer. This dimensional transition allows the non-light emitting area to be minimized while the capacitor maintains adequate area through vertical stacking, resolving the contradiction between light emitting area and capacitor area.
3Reliability
If the contact area between active layer and second conductive layer is increased to improve electrical connection, then the manufacturing complexity increases
Solution Approach 1:
The patent divides the contact structure into discrete, well-defined regions: the active layer contact area, the second conductive layer contact area, and the insulating film regions. By segmenting the contact interfaces into distinct zones with clear boundaries, the manufacturing process can target specific areas for contact formation, reducing overall complexity while ensuring reliable electrical connections where needed.
Data Source
AI summary
The disclosure relates to an organic light emitting display panel and an organic light emitting display device including the display panel. Specifically, the organic light emitting display panel includes a buffer layer on a first conductive layer, an active layer on or over the buffer layer, a first insulating film on or over the active layer and overlapping a part of an upper surface of the active layer, a second insulating film on or over the first insulating film and including a first contact hole exposing the part of the upper surface of the active layer, an electrode of an organic light emitting element contacting the active layer through the first and second contact holes, wherein an area in which the active layer and a second conductive layer contact is included in a node at which a reference voltage is applied to a driving transistor.