Organic Light-Emitting Display Panel Testing Architecture
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Solution Overview
Problem
The manufacturing process of organic light-emitting display apparatuses is complex and has low reliability and yield due to the high-density integrated circuits used, leading to increased costs and defects.
Innovation Solution
An organic light-emitting display panel design that includes a pixel unit with a panel test unit, array test unit, and line test unit, which allows for early detection of defects using panel test signals, array test signals, and line test signals to identify shorts and opens in the lines, improving the testing of pixel circuits before the organic light-emitting device is formed, and utilizing a demultiplexer with array test switches to selectively apply test signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Illumination intensity
If a tape-automated bonding (TAB) method is used to connect high-density integrated circuit to array substrate, then the display brightness and color purity are improved, but the manufacturing process complexity increases and manufacturing yield decreases
Solution Approach 1:
The patent extracts the test function from the final product structure and implements it as a separate array test unit that operates during manufacturing. This allows testing capabilities to be removed from the consumer product while maintaining quality control during production, resolving the contradiction between using complex high-density circuits and maintaining simple manufacturable processes.
Solution Approach 2:
The patent applies preliminary testing actions during the manufacturing process itself, before final assembly. The array test unit performs tests on pixel circuits before the organic light-emitting device is fully formed, allowing defects to be detected and corrected early, thereby improving yield without requiring complex post-manufacturing testing.
2Manufacturing precision
If high-density integrated circuit is used to generate scanning and data signals, then the display resolution and quality are improved, but the manufacturing reliability decreases and manufacturing cost increases
Solution Approach 1:
The patent implements feedback mechanisms through the array test unit that provides real-time information about pixel circuit functionality during manufacturing. This feedback allows immediate identification and correction of defects, improving manufacturing reliability while maintaining the high-resolution capabilities of high-density circuits.
Solution Approach 2:
The patent replaces complex mechanical TAB bonding processes with a more reliable integrated approach where the array test unit is built-in during manufacturing. This substitution eliminates the need for separate high-density IC connection processes, thereby improving reliability while maintaining manufacturing precision.
3Ease of manufacture
If driving circuit is integrated directly into pixel circuit array substrate, then the manufacturing process is simplified and yield is improved, but the ability to perform comprehensive testing before device formation is reduced
Solution Approach 1:
The patent makes the array test unit multi-functional by designing it to perform multiple testing operations on different pixel circuits using the same physical infrastructure. The test unit can selectively apply test signals to different data lines and scan lines, providing comprehensive testing capabilities within the integrated substrate without requiring separate testing equipment for each circuit element.
Solution Approach 2:
The patent nests the array test unit within the pixel circuit array substrate itself, with test signal lines and control circuits integrated among the pixel circuits. This nested structure allows comprehensive testing to be performed within the same physical space as the display circuits, maintaining manufacturing simplicity while enabling thorough testing before device formation.
Data Source
AI summary
An organic light-emitting display panel includes a pixel unit connected to a plurality of scanning lines and a plurality of data lines, and including a plurality of pixels, a panel test unit connected to first ends of the plurality of data lines, and configured to output a panel test signal for testing the plurality of pixels, a plurality of data pads connected to second ends of the plurality of data lines, and an array test unit configured to selectively apply a plurality of array test signals to a pixel column of the pixel unit according to a plurality of array test control signals, and detect a signal output from the pixel column to which the plurality of array test signals are applied.