OLED Pixel Storage Capacitor Size Ratio for Array Testing
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing organic light emitting diode (OLED) display technologies face challenges in efficiently testing and optimizing pixel circuits for large-size display panels, particularly in detecting capacitor-related defects and ensuring consistent performance, which affects image quality and production yield.
Innovation Solution
A pixel circuit structure incorporating a 5T1C configuration with a storage capacitor and a specific size ratio relative to the gate insulating layer, coupled in series, allows for effective detection of inferior capacitors through electron beam irradiation and secondary electron detection, enabling reliable array testing and improved production yield.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the storage capacitor size is increased to improve detection accuracy and reduce inferiority, then the manufacturing precision and detection success rate improve, but the device complexity and area increase
Solution Approach 1:
The patent applies parameter changes by optimizing the storage capacitor size to be 2-4 times the gate insulating layer size. This specific parameter range resolves the contradiction by providing sufficient capacitance for reliable inferiority detection while preventing excessive device complexity and area consumption.
2Reliability
If the storage capacitor size is increased to improve detection accuracy, then the reliability of pixel circuit testing improves, but the manufacturing cost and production efficiency worsen
Solution Approach 1:
The patent optimizes the storage capacitor size parameter to 2-4 times the gate insulating layer size, which resolves the contradiction by achieving reliable detection accuracy while maintaining production efficiency. This parameter range ensures sufficient detection capability without excessive area consumption that would reduce production yield.
Solution Approach 2:
The patent applies partial action by using a moderate capacitor size ratio (2-4 times) rather than excessively large capacitors. This provides sufficient detection accuracy for reliable pixel circuit testing while avoiding the diminishing returns and area penalties that would occur with overly large capacitors, thus maintaining production efficiency.
3Measurement precision
If the storage capacitor size is optimized to 2-4 times the gate insulating layer size, then the detection of inferior capacitors improves, but the design complexity increases
Solution Approach 1:
The patent applies parameter changes by establishing a specific design rule that the storage capacitor size should be 2-4 times the gate insulating layer size. This resolves the contradiction by providing clear design guidelines that improve inferiority detection precision while avoiding arbitrary or overly complex design decisions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed pixel circuit structure enhances detection success rates and image quality by optimizing capacitor size ratios, ensuring superior performance and reducing manufacturing defects in OLED display panels.
Implementation Method 1
irradiating an electron beam to an anode of the organic light emitting diode before completing the organic light emitting diode; and testing an inferiority existence of the storage capacitor based on a detection amount of secondary electrons emitted from the anode
Data Source
AI summary
A pixel includes an organic light emitting diode, a first transistor that is connected to a first power source and that supplies a driving current according to a corresponding data voltage to the organic light emitting diode, a second transistor that is connected to a scan line and that transmits the corresponding data voltage from a data line to a driving transistor according to a scan signal transmitted from the scan line, and a first capacitor including one electrode connected to a gate electrode of the first transistor. The first capacitor stores the corresponding data voltage as a first voltage and a size of the first capacitor is in a range of about 2 times to about 4 times a size of a gate insulating layer of the first transistor.