OLED Pixel Circuit With Delayed Gate Scans for Black Gradation

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Solution Overview

Problem

Display devices, particularly organic light emitting display devices, face issues with leakage current and flicker, especially when transitioning between white and black gradations, leading to inaccurate image representation.

Innovation Solution

The display device incorporates a gate driver that modulates the phase of gate scan signals and includes specific transistor arrangements to minimize leakage current and flicker, using p-type and n-type transistors to control the flow of signals, thereby improving pixel circuit structure and reducing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional transistor arrangements are used in pixel circuits, then the circuit structure is simpler, but leakage current and flicker increase, leading to inaccurate black gradation representation

Engineering Contradiction:
Improveimage accuracyVSAvoidtransistor arrangement structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The pixel circuit is divided into multiple transistor units with specific functions (first transistor for current control, second transistor for data signal input, third transistor for gate control, fourth transistor for initialization). This segmentation allows each transistor to perform its function optimally, reducing leakage current and improving black gradation accuracy while maintaining manageable circuit complexity through functional specialization.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different transistor types (p-type and n-type) are strategically placed in specific positions within the pixel circuit based on their electrical characteristics. P-type transistors are used where hole conduction is advantageous, while n-type transistors are used where electron conduction is preferred. This local optimization of transistor properties minimizes leakage current in critical paths and improves overall circuit performance.

Inventive Principle:
Principle #3Local quality

2Reliability

If gate scan signals are supplied without phase modulation, then the gate driver circuit structure is simpler, but leakage current and flicker cannot be effectively reduced

Engineering Contradiction:
Improveleakage current reductionVSAvoidgate driver circuit structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The gate driver circuit performs phase modulation of gate scan signals in advance before they reach the pixel circuits. By pre-modulating the phase of gate scan signals, the circuit proactively reduces leakage current and flicker effects before they manifest in the display, improving reliability without requiring complex modifications to the pixel circuits themselves.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The gate driver circuit dynamically adjusts the phase of gate scan signals based on operational requirements. This dynamic phase modulation allows the circuit to adapt to different operating conditions, effectively reducing leakage current and flicker while maintaining flexibility in the gate driver design.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS20260057842A1Display device
Publication Date: 2026.02.26 SAMSUNG DISPLAY CO LTD
  • US20260057842A1 patent drawing
  • US20260057842A1 patent drawing
  • US20260057842A1 patent drawing

AI summary

A display device includes a display panel in which a plurality of pixels are arranged in a display area to display an image; and a gate driver supplying gate scan signals to the plurality of pixels in units of horizontal lines, wherein the plurality of pixels include: a first transistor connected between a driving voltage line and a second node; a sixth transistor connected between the second node and a common voltage line; a light emitting element connected between the sixth transistor and the common voltage line; and a fourth transistor connected between the second node and an initialization voltage line, and the gate driver generates another gate scan signal by delaying a phase of one of the gate scan signals, and supplies the another gate scan signal of which the phase is delayed to the plurality of pixels.