Organic Light Emitting Diode Pixel Driving Circuit with Initialization Period

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Solution Overview

Problem

Current display devices, particularly organic light emitting display devices, face challenges in improving image quality due to limitations in pixel driving methods that do not effectively manage voltage levels and signal timing, leading to issues like threshold voltage noise and inefficient light emission.

Innovation Solution

The display device incorporates a pixel driving mechanism with distinct periods for reset, compensation, relay, emission, and initialization, utilizing transistors and capacitors to manage voltage levels and signal timing, including an initialization period between reset and compensation or relay and emission periods, to optimize organic light emitting diode operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If traditional pixel driving methods are used without distinct initialization and compensation periods, then device complexity is reduced, but image quality deteriorates due to threshold voltage noise and inefficient light emission

Engineering Contradiction:
Improveimage qualityVSAvoidpixel driving mechanism complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The frame period is segmented into five distinct periods: reset period, compensation period, relay period, emission period, and initialization period. Each period performs a specific function (resetting voltages, compensating threshold voltages, relaying signals, emitting light, and initializing electrodes), allowing precise control of pixel operation to improve image quality while managing complexity through functional separation

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The initialization period is positioned between the reset period and compensation period (or between relay period and emission period) to preliminarily initialize the anode electrode to a reference voltage before subsequent operations. This preliminary action ensures that threshold voltage noise is compensated and electrodes are properly prepared, improving image quality through advance preparation

Inventive Principle:
Principle #10Preliminary action

2Productivity

If multiple transistors and capacitors are added to manage voltage levels and signal timing, then light emission efficiency is improved, but device complexity increases

Engineering Contradiction:
Improvelight emission efficiencyVSAvoidtransistor and capacitor count
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The first node serves multiple functions: it is the gate electrode of the first transistor, connected to the first capacitor, and receives signals from the second transistor during compensation period. This multi-functionality allows efficient voltage management and signal timing control using a shared node, improving light emission efficiency without proportionally increasing device complexity

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The first capacitor acts as an intermediary element that stores voltage between the first node and second node, managing voltage levels and timing signals during different periods. This intermediary component enables precise control of the first transistor's gate voltage, improving light emission efficiency while using a single capacitor to handle multiple voltage management tasks

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS10720107B2Display device
Publication Date: 2020.07.21 SAMSUNG DISPLAY CO LTD
  • US10720107B2 patent drawing
  • US10720107B2 patent drawing
  • US10720107B2 patent drawing

AI summary

A display device having a frame period including reset, compensation, relay, emission, and initialization periods. Each pixel includes: an organic light emitting diode having an anode coupled to a second node and a electrode coupled to a second power source; a first transistor between a first power source and the second node, and a gate electrode coupled to a first node; a second transistor between the first node and the second node; a third transistor between the first power source and a third node; a fourth transistor between a fourth node and the third node; a fifth transistor between a data line and the fourth node; a sixth transistor between a third power source and the second node; a first capacitor between the third node and the first node; and a second capacitor coupled the fourth node and the third power source.