OLED Pixel Hybrid Compensation for Hysteresis and Flicker
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Solution Overview
Problem
Organic light-emitting diode (OLED) display pixels face variations in transistor threshold voltages due to process, voltage, and temperature (PVT) fluctuations, leading to inconsistent light production and image quality.
Innovation Solution
The implementation of a display pixel configuration that includes an organic light-emitting diode (OLED), a drive transistor, emission transistors, a semiconducting-oxide transistor, storage capacitors, data loading, initialization, and anode reset transistors, with specific operational phases such as initialization, on-bias stress, threshold voltage sampling, and emission, which allows for in-pixel threshold voltage cancellation and external compensation to mitigate hysteresis and improve refresh rates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional display pixels are used without compensation mechanisms, then device complexity is low, but manufacturing precision deteriorates due to PVT variations causing inconsistent light production
Solution Approach 1:
The pixel circuit is segmented into multiple functional blocks: drive transistor for current control, emission transistors for timing control, semiconducting-oxide transistor for threshold voltage compensation, storage capacitors for voltage holding, and control transistors for initialization and reset. Each segment performs a specific function to collectively achieve consistent light production despite PVT variations.
Solution Approach 2:
The patent employs parameter changes through dual compensation mechanisms: in-pixel threshold voltage sampling and storage adjusts the drive transistor's operating parameters in real-time, while external NBTS/PBTS compensation modifies the transistor's threshold voltage characteristics through stress application. These parameter adjustments compensate for PVT variations to maintain consistent luminance.
2Manufacturing precision
If in-pixel compensation circuits are added to mitigate PVT variations, then manufacturing precision improves, but device complexity increases due to additional transistors and capacitors
Solution Approach 1:
The patent merges multiple compensation functions into a unified in-pixel circuit architecture. The semiconducting-oxide transistor integrates threshold voltage sampling, storage capacitor holds the sampled voltage, and emission transistors coordinate the timing of compensation operations. This merging reduces the need for separate external compensation circuits while achieving both in-pixel and external compensation effects.
Solution Approach 2:
The drive transistor serves multiple functions: it acts as the current source for OLED driving, the whose threshold voltage is being compensated, and part of the compensation mechanism itself through its interaction with the semiconducting-oxide transistor and storage capacitor. The emission transistors serve dual purposes of timing control and compensation operation enablement.
3Reliability
If multiple stress phases are implemented to compensate for transistor aging, then reliability improves, but duration of action increases due to extended initialization and stress periods
Solution Approach 1:
The patent implements periodic action through structured stress phases: negative bias temperature stress (NBTS) is applied during initialization to compensate for aging effects, followed by positive bias temperature stress (PBTS) during emission. This periodic application of opposing stresses balances the cumulative aging effect while fitting within the display's refresh cycle, maintaining reliability without excessive time extension.
Solution Approach 2:
The NBTS phase is performed as a preliminary action before the emission phase to pre-compensate for transistor aging and hysteresis effects. By applying the stress in advance during initialization, the system prepares the transistor for optimal performance before actual image display, reducing the need for extended compensation during active display periods.
4Manufacturing precision
If on-bias stress phase is performed prior to threshold voltage sampling, then manufacturing precision improves by reducing hysteresis effects, but loss of time increases due to additional phase duration
Solution Approach 1:
The on-bias stress phase is performed as a preliminary action immediately before threshold voltage sampling and data loading. This timing ensures that the transistor's threshold voltage is stabilized and hysteresis effects are minimized at the moment of sampling, improving first frame response accuracy. The stress duration is optimized to be sufficient for compensation but brief enough to minimize time loss.
Solution Approach 2:
The on-bias stress phase is integrated continuously into the pixel operation sequence without idle gaps. The stress application begins immediately after initialization and concludes directly before sampling, ensuring continuous useful action. This eliminates wasted time while maintaining the compensation effect, as the stress is applied only during the critical transition period needed for accurate threshold voltage sampling.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances image quality by reducing hysteresis effects, improving first frame response, and supporting low refresh rates while minimizing transistor aging and flicker, thereby maintaining consistent luminance levels.
Implementation Method 1
Each display pixel may include an organic light-emitting diode (OLED) that emits light
Data Source
AI summary
A display pixel is provided that is operable to support hybrid compensation scheme having both in-pixel threshold voltage canceling and external threshold voltage compensation. The display may include multiple p-type silicon transistors with at least one n-type semiconducting-oxide transistor and one storage capacitor. An on-bias stress phase may be performed prior to a threshold voltage sampling and data programming phase to mitigate hysteresis and improve first frame response. In low refresh rate displays, a first additional on-bias stress operation can be performed separate from the threshold voltage sampling and data programming phase during a refresh frame and a second additional on-bias stress operation can be performed during a vertical blanking frame. The display pixel may be configured to receive an initialization voltage and an anode reset voltage, either of which can be dynamically tuned to match the stress of the first and second additional on-bias stress operations to minimize flicker.