CMOS OLED Pixel Circuit Layout for High PPI and Breakdown Resistance
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Solution Overview
Problem
Existing silicon-based OLED display devices face challenges in achieving high pixel density (PPI) and are prone to breakdown under high voltage due to inefficient layout design and transistor structure.
Innovation Solution
The display device incorporates a transistor design with specific doping regions and insulating layer thickness variations, along with a compact layout of transistors, utilizing a silicon substrate and CMOS process to reduce layout area and enhance transistor reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional transistor layout is used, then manufacturing is simpler, but pixel density (PPI) is lower
Solution Approach 1:
The patent implements nested doping structures where drift doped regions are positioned within or adjacent to doped regions, and multiple doped regions with different doping concentrations are arranged in a nested configuration. This nesting allows multiple functional regions to occupy overlapping or adjacent spaces, reducing the overall footprint of the transistor while maintaining all necessary functions, thereby increasing pixel density without excessive layout complexity
Solution Approach 2:
The patent utilizes vertical stacking of doped regions at different depths within the semiconductor substrate. By arranging doped regions in multiple layers (first doped region, drift doped region, second doped region) with different vertical positions and doping concentrations, the design achieves compact lateral footprint while maintaining electrical functionality through three-dimensional spatial arrangement, thus improving pixel density
2Illumination intensity
If high voltage is applied to improve display brightness, then illumination intensity increases, but transistor breakdown risk increases
Solution Approach 1:
The patent applies local quality by creating drift doped regions with specific doping concentrations in particular locations between the source/drain doped regions. These drift regions have different doping concentrations than the main doped regions, creating localized electrical field management zones. This local modification of doping quality allows the transistor to withstand higher voltages applied to the light-emitting element without breakdown, enabling higher display brightness while maintaining reliability
Solution Approach 2:
The drift doped regions are positioned beforehand between the source and drain doped regions to cushion or buffer the electrical field stress before it reaches critical levels. These pre-positioned drift regions with appropriate doping concentrations act as protective zones that distribute and reduce peak electric fields, preventing breakdown before it occurs when high voltage is applied for bright display operation
3Area of stationary object
If doped regions are placed close together to reduce layout area, then area efficiency improves, but electrical interference between regions increases
Solution Approach 1:
The patent changes the doping concentration parameter to resolve the interference issue. By using drift doped regions with different doping concentrations than the main source/drain doped regions, and by varying the doping concentrations of different doped regions relative to each other, the electrical characteristics are optimized. This parameter variation allows closely spaced doped regions to coexist without excessive electrical interference, enabling compact layout area while maintaining electrical performance
Data Source
AI summary
A display device and a manufacturing method thereof are disclosed. The display device includes a base substrate and at least one pixel circuit provided on the base substrate. The pixel circuit includes a driving transistor, a first transistor, and a second transistor; the base substrate includes a semiconductor body that can be doped, and a first conductive layer and a second conductive layer that are on the semiconductor body; the first transistor includes a first doped region in contact with the first electrode of the first transistor, and a second doped region in contact with a second electrode of the first transistor, and the first doped region of the first transistor and the second doped region of the first transistor are spaced apart from each other, have a same doping type, and are both in the semiconductor body.