OLED Pixel Circuit Layout for Higher PPI and Latch-Up Prevention
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Solution Overview
Problem
Pixel circuits in OLED display devices occupy a large area, hindering the achievement of better display effects and high resolution, and are prone to issues like short-circuiting and latch-up effects, which degrade display uniformity and reliability.
Innovation Solution
A display substrate design with optimized transistor arrangement, including different types of transistors in specific regions, reduces pixel circuit area and enhances layout efficiency, using transistors with varying sizes in arrays to minimize space occupation and improve pixel size and resolution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If pixel circuits are designed with conventional transistor arrangements, then the circuit functionality is ensured, but the pixel area becomes large which reduces display resolution
Solution Approach 1:
The pixel circuit is divided into distinct functional regions: a first region containing first transistors (input transistors) and a second region containing second transistors (driving transistors). This spatial segmentation allows optimized placement of different transistor types in their respective regions, reducing overall pixel area while maintaining circuit functionality.
Solution Approach 2:
Different types of transistors are placed in different regions based on their functional requirements. First transistors are located in the first region with specific electrical characteristics, while second transistors are located in the second region with different characteristics. This local differentiation optimizes the electrical performance and reduces the area required for each transistor type.
2Reliability
If uniform transistor types are used throughout the pixel circuit, then the circuit design is simplified, but short-circuiting and latch-up effects occur which degrade display uniformity
Solution Approach 1:
The pixel circuit is segmented into a first region with first transistors and a second region with second transistors. This segmentation prevents short-circuiting and latch-up effects by ensuring that transistors of different types are spatially separated and properly configured in their respective regions, thereby improving display uniformity and reliability.
Solution Approach 2:
Different transistor types are assigned to different regions based on their electrical characteristics and functional requirements. First transistors in the first region have specific properties suitable for input signaling, while second transistors in the second region have properties suitable for driving the light-emitting element. This local differentiation eliminates harmful electrical effects while maintaining overall circuit simplicity.
3Power
If larger transistors are used to ensure proper driving capability, then the driving performance is improved, but the pixel area increases which reduces PPI
Solution Approach 1:
Transistors are designed with different sizes and types in different regions based on their specific functional requirements. Second transistors (driving transistors) in the second region are optimized for driving capability with appropriate sizes, while first transistors in the first region are optimized for their input functions with smaller sizes. This local optimization ensures sufficient driving performance while minimizing the overall pixel area.
Data Source
AI summary
A display substrate, a pixel circuit, a driving method and a display device are provided. The display substrate includes a substrate and a plurality of repeating units arranged in an array on one side of the substrate, each repeating unit includes at least two light emitting elements and at least two pixel circuits, each pixel circuit includes a first transistor, a second transistor and a third transistor, and the third transistor is configured to drive the light emitting element to emit light; each repeating unit further includes a first region, a second region and a third region arranged continuously in the first direction, the first region includes at least two of the first transistors, the third region including at least two of the third transistors, and the type of the first transistor and the type of the third transistor are different.