OLED Pixel Layout for Short Circuit Prevention
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Solution Overview
Problem
Conventional OLED display panels face manufacturing defects due to short circuits between data bus lines and power supply lines, which result in image errors, primarily because of the close proximity of these lines, necessitating a design that increases the spacing between them.
Innovation Solution
The design introduces a display panel structure where adjacent pixel portions share a data line and a bias voltage line, increasing the distance between the data line and the power supply line, and employs a driving method that activates gate and data signals in specific time intervals to prevent short circuits during manufacturing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the distance between data bus line and power supply line is increased to prevent short circuits, then manufacturing reliability is improved, but the emissive area is reduced
Solution Approach 1:
The patent changes the spatial arrangement from a planar layout to a three-dimensional stacked structure. Different pixel portions are arranged in vertical layers, allowing data bus lines and power supply lines to be separated in the vertical dimension while maintaining close horizontal spacing for maximum emissive area.
Solution Approach 2:
The display panel is divided into multiple pixel portions (first pixel portion, second pixel portion, etc.) arranged in different layers. Each pixel portion has its own data bus line and power supply line connections, enabling independent addressing and reducing interference between adjacent lines.
2Reliability
If adjacent pixel portions share data lines and bias voltage lines to reduce line density, then manufacturing defects are reduced, but the driving complexity increases
Solution Approach 1:
Data lines and bias voltage lines serve multiple functions by being shared among adjacent pixel portions. A single data line provides data signals to multiple pixel portions in different layers, reducing the total number of lines required and simplifying the manufacturing process.
Solution Approach 2:
The patent employs periodic gating signals with specific timing sequences to selectively activate different pixel portions. By controlling the timing of gate signals, the system can address shared data lines in a time-multiplexed manner, preventing signal interference while maintaining simple line routing.
Data Source
AI summary
A display device includes a first pixel and a second pixel. The first pixel and the second pixel are defined by a first gate bus line, a second gate bus line, a first power supply line and a second power supply line. A data bus line between the first supply line and the second supply line divides the first pixel from the second pixel line. Accordingly, the pixel shares a data bus line or a power supply line with adjacent pixel. Advantageously, thereby, more space between lines prevents defects caused during fabricating the display device and improve a reliability of the display device.