OLED Pixel Vertical Architecture Planarization Via

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Solution Overview

Problem

The challenge in developing vertical stacked pixels is to create a TFT backplane suitable for subsequent OLED fabrication with high yield and performance, while maintaining a smooth substrate to prevent light-emitting property deterioration and electrode shorts, which is difficult due to the thin organic layers and potential roughness of the substrate.

Innovation Solution

A vertical pixel architecture is introduced with a planarization dielectric layer between the TFT backplane and OLED layers, featuring through-via with sloped sidewalls and a smooth contact plate for electrical connection, ensuring a roughness of 1 nm or less to facilitate successful OLED fabrication and prevent electrical shorts.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If a TFT backplane is used for vertical stacked pixels, then aperture ratio is improved, but substrate roughness increases causing OLED fabrication failure

Engineering Contradiction:
Improveaperture ratioVSAvoidsubstrate roughness
Core Design Contradiction:
Area of stationary objectVSManufacturing precision

Solution Approach 1:

A planarization dielectric layer is introduced as an intermediary between the TFT backplane and OLED layers. This intermediate layer smooths the substrate surface to achieve less than 1 nm RMS roughness, enabling successful OLED fabrication on TFT backplanes that would otherwise be too rough due to their vertical stacked structure.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The structure is segmented into distinct functional layers: TFT backplane for electrical connection, planarization dielectric layer for surface smoothing, and OLED layers for light emission. This segmentation allows each layer to optimize its function without compromising the other, resolving the conflict between aperture ratio and substrate smoothness.

Inventive Principle:
Principle #1Segmentation

2Area of stationary object

If vertical stacked pixel architecture is used, then aperture ratio is improved, but device complexity increases

Engineering Contradiction:
Improveaperture ratioVSAvoidfabrication process complexity
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The planarization dielectric layer is formed preliminarily before OLED fabrication to pre-smooth the TFT backplane surface. This preliminary action eliminates the need for complex in-situ smoothing processes during OLED manufacturing, simplifying the overall fabrication process while maintaining high aperture ratio.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If thin organic layers are used in OLED, then device performance is improved, but susceptibility to substrate roughness increases

Engineering Contradiction:
ImproveOLED performanceVSAvoidsubstrate roughness impact
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The planarization dielectric layer serves as a cushioning layer formed beforehand to absorb and compensate for substrate roughness. This protective intermediate layer ensures that the thin organic OLED layers are deposited on a smooth surface, preventing defects and electrical shorts that would otherwise occur due to underlying substrate irregularities.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Data Source

PatentUS7948170B2Pixel having an organic light emitting diode and method of fabricating the pixel
Publication Date: 2011.05.24 IGNIS INNOVATIONS DISPLAY PANELS LLC
  • US7948170B2 patent drawing
  • US7948170B2 patent drawing
  • US7948170B2 patent drawing

AI summary

A pixel having an organic light emitting diode (OLED) and method for fabricating the pixel is provided. A planarization dielectric layer is provided between a thin-film transistor (TFT) based backplane and OLED layers. A through via between the TFT backplane and the OLED layers forms a sidewall angle of less than 90 degrees to the TFT backplane. The via area and edges of an OLED bottom electrode pattern may be covered with a dielectric cap.