OLED Pixel Circuit Data Line Reset for High-Refresh Uniformity

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Solution Overview

Problem

Existing OLED display panels face issues with insufficient scanning turn-on time, inadequate data voltage signal writing time, and residual voltages causing crosstalk and display quality degradation, along with increased power consumption.

Innovation Solution

Incorporating a data line reset module and multiplexing circuit to reset data lines before data writing, allowing for synchronized data line reset and writing stages, reducing power consumption and improving display uniformity and quality.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the scanning turn-on time of each row is shortened to increase refresh rate, then productivity is improved, but the data writing time becomes insufficient leading to inadequate threshold compensation

Engineering Contradiction:
Improverefresh rateVSAvoiddata writing time
Core Design Contradiction:
ProductivityVSDuration of action of moving object

Solution Approach 1:

The patent applies preliminary action by resetting the data line voltage to a reference level before the data writing operation begins. This preparatory reset ensures that the data line is ready to receive the data voltage signal without interference from residual voltages, enabling sufficient threshold compensation even when the overall scanning time is shortened for high refresh rates.

Inventive Principle:
Principle #10Preliminary action

2Manufacturing precision

If the data writing time is extended to improve threshold compensation, then display uniformity is improved, but power consumption increases

Engineering Contradiction:
Improvedisplay uniformityVSAvoidpower consumption
Core Design Contradiction:
Manufacturing precisionVSUse of energy by moving object

Solution Approach 1:

The patent implements periodic action by introducing a reset stage that periodically clears residual voltages from data lines before each data writing operation. This periodic resetting improves display uniformity by eliminating crosstalk between frames without requiring extended data writing time, thus avoiding increased power consumption while maintaining threshold compensation quality.

Inventive Principle:
Principle #19Periodic action

3Device complexity

If residual voltages on data lines are not reset, then device complexity is reduced, but crosstalk between RGB display data occurs affecting display quality

Engineering Contradiction:
Improvecircuit structureVSAvoiddisplay quality
Core Design Contradiction:
Device complexityVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by adding a reset stage before the data writing stage that actively clears residual voltages from data lines. This preliminary reset action prevents crosstalk between RGB display data and improves display quality without significantly increasing device complexity, as the reset module uses simple transistor-based circuitry that can be integrated into the existing pixel structure.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12548511B2Display panel, driving method thereof and display device thereof
Publication Date: 2026.02.10 WUHAN TIANMA MICRO ELECTRONICS CO LTD
  • US12548511B2 patent drawing
  • US12548511B2 patent drawing
  • US12548511B2 patent drawing

AI summary

Display panel, driving method, and display device are provided. The display panel includes sub-pixels and data lines. A sub-pixel includes a pixel circuit and a light emitting element. The pixel circuit includes a data writing module electrically connected to a driving transistor, and a data line reset module. A first terminal of the data line reset module is electrically connected to a data line, a second terminal of the data line reset module is electrically connected to a data line reset signal terminal. An operation stage of the pixel circuit at least includes a data writing stage. In the data writing stage, the data writing module transmits a data voltage signal to the driving transistor. The operation stage also includes a data line reset stage. In the data line reset stage, the data line reset signal terminal transmits a data line reset signal to the data line.