OLED Display Pixel Circuit With Shared Gate and Poly-Si Layer

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Solution Overview

Problem

Existing display technologies face challenges in reducing manufacturing time and cost due to the complexity and cost associated with using polycrystalline silicon, which requires a crystallization step, while amorphous silicon has low charge mobility.

Innovation Solution

A display device design incorporating a first transistor with an oxide semiconductor and a second transistor with polycrystalline silicon, where the first gate electrode and second semiconductor layer are on the same layer, allowing for a simplified manufacturing process by eliminating the need for separate gate electrode formation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If polycrystalline silicon is used for the semiconductor layer, then charge mobility is improved, but manufacturing process complexity and cost increase due to crystallization step

Engineering Contradiction:
Improvecharge mobilityVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The transistor structure is divided into two types: first transistors with oxide semiconductor layers for low-power operations, and second transistors with polycrystalline silicon layers for high-speed operations. This segmentation allows each transistor type to be optimized for its specific function, achieving high charge mobility where needed without requiring all transistors to undergo complex crystallization processes.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different semiconductor materials are used in different locations based on functional requirements. Polycrystalline silicon is used specifically in the second transistor where high charge mobility is critical, while oxide semiconductor is used in the first transistor where low power consumption is prioritized. This local quality approach ensures high performance at critical points without incurring the cost and complexity of using polycrystalline silicon throughout the entire device.

Inventive Principle:
Principle #3Local quality

2Ease of manufacture

If amorphous silicon is used for the semiconductor layer, then manufacturing process is simplified, but charge mobility deteriorates

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoidcharge mobility
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent applies different semiconductor materials to different transistor locations based on functional requirements. The first transistor uses amorphous or oxide semiconductor for simplified manufacturing, while the second transistor uses polycrystalline silicon for high charge mobility. This local differentiation resolves the contradiction by ensuring high performance at critical points without requiring simplified materials everywhere.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The display device employs a composite structure with two types of transistors using different semiconductor materials. This composite approach allows the device to combine the manufacturing simplicity of amorphous/oxide semiconductors with the high charge mobility of polycrystalline silicon, achieving overall optimization without the limitations of using a single material type throughout.

Inventive Principle:
Principle #40Composite materials

3Reliability

If separate gate electrode formation is performed for each transistor, then transistor performance is optimized, but manufacturing time and cost increase

Engineering Contradiction:
Improvetransistor performanceVSAvoidmanufacturing efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The gate electrodes of the first and second transistors are formed in the same manufacturing step using the same material layer. This merging of formation steps reduces the total number of manufacturing steps and associated costs, while the subsequent differentiation in semiconductor materials allows each transistor to maintain its optimized performance characteristics.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The gate electrode layer serves as a universal component for both first and second transistors, performing the same function in both devices. This universality in gate electrode formation allows for simplified manufacturing processes, while the differentiated semiconductor layers below enable each transistor type to be optimized for its specific function, resolving the contradiction between manufacturing efficiency and performance optimization.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design reduces manufacturing time and cost by enabling a simpler process through shared formation of the first gate electrode and second semiconductor layer, utilizing polycrystalline silicon for high charge mobility and oxide semiconductor for cost-effectiveness.

Implementation Method 1

an electron injected from a cathode, which is one electrode, and a hole injected from an anode, which is the other electrode, are coupled with each other in the light emitting layer to generate an exciton, and the exciton emits energy to emit light

Methodology Applied
Scientific EffectElectroluminescence: Electroluminescence

Data Source

PatentUS12575242B2Display device
Publication Date: 2026.03.10 SAMSUNG DISPLAY CO LTD
  • US12575242B2 patent drawing
  • US12575242B2 patent drawing
  • US12575242B2 patent drawing

AI summary

A display device according to some embodiments includes: a substrate; a first transistor and a second transistor disposed on the substrate and spaced apart from each other; a first electrode connected to one of the first transistor and the second transistor; a second electrode overlapping the first electrode; and a light emitting layer between the first electrode and the second electrode, wherein the first transistor may include: a first semiconductor layer on the substrate; a first gate electrode on the first semiconductor layer; and a first source electrode and a first drain electrode connected to the first semiconductor layer, and the second transistor may include: a second semiconductor layer on the substrate; a second gate electrode on the second semiconductor layer; and a second source electrode and a second drain electrode connected to the second semiconductor layer, and the first gate electrode and the second semiconductor layer may be on the same layer.