OLED Pixel Layout Optimization via Shared Reset Transistors
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Solution Overview
Problem
The existing OLED display substrates face challenges with chaotic and complex layouts of signal lines, which hinder efficient optimization of pixel space and increase the area occupied by signal lines and drive circuits.
Innovation Solution
The proposed display substrate features a symmetric arrangement of transistors and signal lines along intersecting directions, allowing for central disposition of signal lines and sharing of light emitting control circuits between adjacent pixels, thereby optimizing pixel space and reducing the number of control circuits and lines required.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If signal lines are arranged in a conventional manner, then the layout is simple to implement, but the layout becomes chaotic and complex, hindering efficient optimization of pixel space
Solution Approach 1:
The patent applies asymmetric design by arranging reset transistors and signal lines in non-symmetric positions relative to the pixel center, allowing for optimized signal line routing that reduces layout complexity while maintaining manufacturing simplicity. The asymmetric placement enables better spacing and routing paths for signal lines.
Solution Approach 2:
The patent utilizes multi-dimensional arrangement by positioning signal lines and transistors in different spatial dimensions and layers, transitioning from conventional two-dimensional layouts to three-dimensional configurations. This allows signal lines to be routed through multiple dimensions, reducing planar complexity and improving overall layout efficiency.
2Adaptability or versatility
If more signal lines and drive circuits are added, then display functionality is improved, but the area occupied by signal lines and drive circuits increases
Solution Approach 1:
The patent merges adjacent reset transistors into a shared structure that serves multiple pixels simultaneously. By combining the reset transistor functions of neighboring pixels into a single shared transistor with common source/drain regions, the patent reduces the total number of transistors and signal lines required, thereby decreasing the area occupied while maintaining full display functionality.
Solution Approach 2:
The patent implements universal design by creating signal lines and drive circuits that serve multiple pixels and functions. The reset signal lines are configured to provide reset signals to multiple pixels, and the drive circuits are designed with multi-functional capabilities, allowing a single circuit to perform multiple operations, thus reducing the overall area required.
3Measurement precision
If pixel space is optimized, then resolution is improved, but the layout becomes more complex
Solution Approach 1:
The patent segments the pixel structure into distinct functional regions with clear boundaries, separating reset transistor areas, light emitting element regions, and signal line paths. This segmentation allows for precise optimization of each region's dimensions and positions, enabling higher resolution while maintaining layout clarity and reducing overall complexity through modular design.
Data Source
AI summary
Provided is a display substrate. The display substrate includes two pixels arranged along a first direction and adjacent to each other on a base substrate, and a pixel circuit in each of the two pixels includes a drive transistor, a first reset transistor, and a second reset transistor. A display device is also provided.