OLED Pixel Circuit With Split Data Transistors for Precise Current Control
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Solution Overview
Problem
Existing display apparatuses face challenges in achieving improved display quality and efficiency, particularly in managing the control of current supply to light-emitting diodes and gate signals to enhance pixel performance.
Innovation Solution
A pixel structure is introduced with a specific configuration of transistors and capacitors, including a 2-1 and 2-2 transistor pair for data signal control, and a gate-on voltage management system to optimize the supply of gate signals, along with a bias voltage and emission control, enhancing the control of current to the light-emitting diode.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a conventional single-transistor configuration is used for data signal control, then the device complexity is low, but the display quality and current control precision are insufficient
Solution Approach 1:
The second transistor is divided into two series-connected transistors (2-1 and 2-2), each controlled by separate gate lines (1-1 and 1-2). This segmentation allows independent control of data signal writing and maintenance phases, improving current control precision without requiring a complete redesign of the pixel structure.
Solution Approach 2:
The pixel circuit uses dynamic voltage level switching for gate control, where gate-on voltages at different levels control the timing and duration of transistor activation. This dynamic control enables precise timing of data signal writing and maintenance, enhancing display quality while managing complexity through temporal rather than structural changes.
2Reliability
If multiple gate signals are supplied simultaneously to control transistors, then the current control and emission timing are improved, but the gate signal management complexity increases
Solution Approach 1:
The circuit performs preliminary actions by writing the data signal to the first node before the emission phase begins. The 2-1 and 2-2 transistors are controlled to complete data writing in advance, allowing subsequent emission control to proceed with simpler timing requirements and reduced signal management complexity during the critical emission window.
Solution Approach 2:
The gate signals are supplied in periodic cycles corresponding to different phases of the display refresh cycle: data writing phase, emission phase, and non-emission phase. This periodic structure organizes complex multi-signal control into predictable temporal patterns, improving reliability while making signal management more systematic and less chaotic.
3Measurement precision
If the data signal writing time is extended to improve signal stability, then the measurement precision is improved, but the time available for emission is reduced
Solution Approach 1:
Data signal writing is performed in advance during a dedicated writing phase before the emission phase begins. The 2-1 and 2-2 transistors are controlled to complete the data writing process early, ensuring signal stability is achieved beforehand, thereby preserving the full emission duration for light output without compromising data signal quality.
Solution Approach 2:
The gate-on voltage is applied for a duration that exceeds the minimum required for data writing, providing a margin that ensures complete and stable signal writing. This partial excessive action in the writing phase guarantees measurement precision while the structured timing ensures emission duration is not compromised, as the extra writing time is accounted for in the overall phase timing.
Data Source
AI summary
A pixel includes a light-emitting diode, a first transistor connected between a first voltage line and the light-emitting diode, and configured to control a current supplied to the light-emitting diode, a second transistor connected between a data line and a first node connected to a first terminal of the first transistor, and including a 2-1 transistor connected between the data line and a fourth node, and a 2-2 transistor in series with the 2-1 transistor and connected between the fourth node and the first node, a third transistor connected between a second node connected to a gate of the first transistor and a third node connected to a second terminal of the first transistor, a fifth transistor connected between the first voltage line and the first node, and a sixth transistor connected between the third node and the light-emitting diode.